PIC16F877T-20/PT Microchip Technology, PIC16F877T-20/PT Datasheet - Page 344
![IC MCU FLASH 8KX14 EE 44TQFP](/photos/6/82/68251/c04-076_pt_sml.jpg)
PIC16F877T-20/PT
Manufacturer Part Number
PIC16F877T-20/PT
Description
IC MCU FLASH 8KX14 EE 44TQFP
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16F688T-ISL.pdf
(688 pages)
3.PIC16C770-ISO.pdf
(8 pages)
4.PIC16F873-04SO.pdf
(218 pages)
5.PIC16F873-04SO.pdf
(5 pages)
6.PIC16F873-04SO.pdf
(5 pages)
Specifications of PIC16F877T-20/PT
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
33
Program Memory Size
14KB (8K x 14)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
368 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
44-TQFP, 44-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC16F877T-20/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
- PIC16F616T-ISL PDF datasheet
- PIC16F688T-ISL PDF datasheet #2
- PIC16C770-ISO PDF datasheet #3
- PIC16F873-04SO PDF datasheet #4
- PIC16F873-04SO PDF datasheet #5
- PIC16F873-04SO PDF datasheet #6
- Current page: 344 of 688
- Download datasheet (3Mb)
PICmicro MID-RANGE MCU FAMILY
18.4
18.4.1
DS31018A-page 18-8
USART Asynchronous Transmitter
USART Asynchronous Mode
In this mode, the USART uses standard nonreturn-to-zero (NRZ) format (one start bit, eight or
nine data bits and one stop bit). The most common data format is 8-bits. An on-chip dedicated
8-bit baud rate generator can be used to derive standard baud rate frequencies from the oscilla-
tor. The USART transmits and receives the LSb first. The USART’s transmitter and receiver are
functionally independent but use the same data format and baud rate. The baud rate generator
produces a clock either x16 or x64 of the bit shift rate, depending on the BRGH bit (TXSTA<2>).
Parity is not supported by the hardware, but can be implemented in software (stored as the ninth
data bit). Asynchronous mode is stopped during SLEEP.
Asynchronous mode is selected by clearing the SYNC bit (TXSTA<4>).
The USART Asynchronous module consists of the following important elements:
• Baud Rate Generator
• Sampling Circuit
• Asynchronous Transmitter
• Asynchronous Receiver
The USART transmitter block diagram is shown in
transmit (serial) shift register (TSR). The shift register obtains its data from the read/write transmit
buffer, TXREG. The TXREG register is loaded with data in software. The TSR register is not
loaded until the STOP bit has been transmitted from the previous load. As soon as the STOP bit
is transmitted, the TSR is loaded with new data from the TXREG register (if available). Once the
TXREG register transfers the data to the TSR register (occurs in one T
is empty and the TXIF flag bit is set. This interrupt can be enabled/disabled by setting/clearing
the TXIE enable bit. The TXIF flag bit will be set regardless of the state of the TXIE enable bit and
cannot be cleared in software. It will reset only when new data is loaded into the TXREG register.
While the TXIF flag bit indicated the status of the TXREG register, the TRMT bit (TXSTA<1>)
shows the status of the TSR register. The TRMT status bit is a read only bit which is set when
the TSR register is empty. No interrupt logic is tied to this bit, so the user has to poll this bit in
order to determine if the TSR register is empty.
Transmission is enabled by setting the TXEN enable bit (TXSTA<5>). The actual transmission will
not occur until the TXREG register has been loaded with data and the baud rate generator (BRG)
has produced a shift clock
the TXREG register and then setting the TXEN enable bit. Normally when transmission is first
started, the TSR register is empty, so a transfer to the TXREG register will result in an immediate
transfer to TSR resulting in an empty TXREG. A back-to-back transfer is thus possible
(Figure
be aborted and will reset the transmitter. As a result the TX/CK pin will revert to hi-impedance.
In order to select 9-bit transmission, transmit bit, TX9 (TXSTA<6>), should be set and the ninth
bit should be written to the TX9D bit (TXSTA<0>). The ninth bit must be written before writing the
8-bit data to the TXREG register. This is because a data write to the TXREG register can result
in an immediate transfer of the data to the TSR register (if the TSR is empty). In such a case, an
incorrect ninth data bit maybe loaded in the TSR register.
Note 1: The TSR register is not mapped in data memory so it is not available to the user.
Note 2: When the TXEN bit is set, the TXIF flag bit will also be set since the transmit buffer
18-3). Clearing the TXEN enable bit during a transmission will cause the transmission to
is not yet full (still can move transmit data to the TXREG register).
(Figure
18-1). The transmission can also be started by first loading
Figure
18-1. The heart of the transmitter is the
1997 Microchip Technology Inc.
CY
), the TXREG register
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