PIC16LF77-I/L Microchip Technology, PIC16LF77-I/L Datasheet - Page 76
![IC PIC MCU FLASH 8KX14 44PLCC](/photos/6/63/66325/150-44-plcc_sml.jpg)
PIC16LF77-I/L
Manufacturer Part Number
PIC16LF77-I/L
Description
IC PIC MCU FLASH 8KX14 44PLCC
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Specifications of PIC16LF77-I/L
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
33
Program Memory Size
14KB (8K x 14)
Program Memory Type
FLASH
Ram Size
368 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 8x8b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
44-PLCC
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Other names
PIC16LF77I/L
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC16LF77-I/L
Manufacturer:
Microchip Technology
Quantity:
10 000
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- Download datasheet (5Mb)
PIC16F7X
Steps to follow when setting up an Asynchronous
Transmission:
1.
2.
3.
4.
FIGURE 10-2:
FIGURE 10-3:
TABLE 10-5:
DS30325B-page 74
0Bh, 8Bh,
10Bh,18Bh
0Ch
18h
19h
8Ch
98h
99h
Legend: x = unknown, - = unimplemented locations read as '0'. Shaded cells are not used for asynchronous transmission.
Note 1: Bits PSPIE and PSPIF are reserved on the PIC16F73/76; always maintain these bits clear.
(Interrupt Reg. Flag)
Address
Reg. Empty Flag)
Reg. Empty Flag)
RC6/TX/CK (pin)
Write to TXREG
(Transmit Buffer
Reg. Empty Flag)
Note: This timing diagram shows two consecutive transmissions.
RC6/TX/CK (pin)
Initialize the SPBRG register for the appropriate
baud rate. If a high speed baud rate is desired,
set bit BRGH (Section 10.1).
Enable the asynchronous serial port by clearing
bit SYNC and setting bit SPEN.
If interrupts are desired, then set enable bit TXIE.
If 9-bit transmission is desired, then set transmit
bit TX9.
(Transmit Shift
Write to TXREG
(Transmit Shift
BRG Output
(Shift Clock)
BRG Output
(Shift Clock)
TRMT bit
TXIF bit
TRMT bit
INTCON
PIR1
RCSTA
TXREG USART Transmit Register
PIE1
TXSTA
SPBRG Baud Rate Generator Register
TXIF bit
Name
REGISTERS ASSOCIATED WITH ASYNCHRONOUS TRANSMISSION
PSPIF
PSPIE
CSRC
SPEN
ASYNCHRONOUS MASTER TRANSMISSION
ASYNCHRONOUS MASTER TRANSMISSION (BACK TO BACK)
B
GIE
it 7
Word 1
Transmit Shift Reg.
Word 1
Transmit Shift Reg
Word 1
(1)
(1)
Word 1
ADIE
Bit 6
PEIE
ADIF
RX9
TX9
START Bit
START Bit
Word 2
TMR0IE
SREN
TXEN
RCIF
RCIE
Bit 5
CREN
SYNC
Bit 0
Bit 4
INTE
TXIF
TXIE
Bit 0
SSPIE CCP1IE TMR2IE
SSPIF CCP1IF
RBIE
Bit 3
—
—
Bit 1
Word 1
Bit 1
Word 1
5.
6.
7.
8.
TMR0IF
BRGH
FERR
Bit 2
Enable the transmission by setting bit TXEN,
which will also set bit TXIF.
If 9-bit transmission is selected, the ninth bit
should be loaded in bit TX9D.
Load data to the TXREG register (starts
transmission).
If using interrupts, ensure that GIE and PEIE in
the INTCON register are set.
TMR2IF
OERR
TRMT
INTF
Bit 1
Bit 7/8
Word 2
Transmit Shift Reg.
TMR1IF
TMR1IE
Bit 7/8
RX9D
TX9D
RBIF
Bit 0
2002 Microchip Technology Inc.
STOP Bit START Bit
STOP Bit
0000 000x
0000 0000
0000 -00x
0000 0000
0000 0000
0000 -010
0000 0000
Value on:
POR,
BOR
Word 2
0000 000u
0000 0000
0000 -00x
0000 0000
0000 0000
0000 -010
0000 0000
Value on
all other
RESETS
Bit 0
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