PIC24FJ256GB206-I/MR Microchip Technology, PIC24FJ256GB206-I/MR Datasheet - Page 40
![MCU PIC 16BIT FLASH 256K 64VQFN](/photos/19/6/190652/4732178_sml.jpg)
PIC24FJ256GB206-I/MR
Manufacturer Part Number
PIC24FJ256GB206-I/MR
Description
MCU PIC 16BIT FLASH 256K 64VQFN
Manufacturer
Microchip Technology
Series
PIC® 24Fr
Specifications of PIC24FJ256GB206-I/MR
Core Size
16-Bit
Program Memory Size
256KB (85.5K x 24)
Core Processor
PIC
Speed
32MHz
Connectivity
I²C, IrDA, SPI, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
52
Program Memory Type
FLASH
Ram Size
96K x 8
Voltage - Supply (vcc/vdd)
2.2 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-VFQFN, Exposed Pad
Controller Family/series
PIC24
No. Of I/o's
52
Ram Memory Size
96KB
Cpu Speed
32MHz
No. Of Timers
5
No. Of Pwm Channels
9
Processor Series
PIC24FJ
Core
PIC
Data Bus Width
16 bit
Data Ram Size
96 KB
Interface Type
I2C, SPI, UART
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
29
Number Of Timers
5
Operating Supply Voltage
2.2 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, DM240001, MA240021
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 16 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
- Current page: 40 of 386
- Download datasheet (4Mb)
PIC24FJ256GB210 FAMILY
3.2
REGISTER 3-1:
DS39975A-page 40
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-9
bit 8
bit 7-5
bit 4
bit 3
bit 2
bit 1
bit 0
Note 1:
R/W-0, HSC
IPL2
U-0
—
2:
CPU Control Registers
(2)
The IPL Status bits are read-only when NSTDIS (INTCON1<15>) = 1.
The IPL Status bits are concatenated with the IPL3 (CORCON<3>) bit to form the CPU Interrupt Priority
Level (IPL). The value in parentheses indicates the IPL when IPL3 = 1.
(1)
R/W-0, HSC
Unimplemented: Read as ‘0’
DC: ALU Half Carry/Borrow bit
1 = A carry out from the 4
0 = No carry out from the 4
IPL<2:0>: CPU Interrupt Priority Level Status bits
111 = CPU interrupt priority level is 7 (15); user interrupts are disabled
110 = CPU interrupt priority level is 6 (14)
101 = CPU interrupt priority level is 5 (13)
100 = CPU interrupt priority level is 4 (12)
011 = CPU interrupt priority level is 3 (11)
010 = CPU interrupt priority level is 2 (10)
001 = CPU interrupt priority level is 1 (9)
000 = CPU interrupt priority level is 0 (8)
RA: REPEAT Loop Active bit
1 = REPEAT loop in progress
0 = REPEAT loop not in progress
N: ALU Negative bit
1 = Result was negative
0 = Result was not negative (zero or positive)
OV: ALU Overflow bit
1 = Overflow occurred for signed (2’s complement) arithmetic in this arithmetic operation
0 = No overflow has occurred
Z: ALU Zero bit
1 = An operation, which affects the Z bit, has set it at some time in the past
0 = The most recent operation, which affects the Z bit, has cleared it (i.e., a non-zero result)
C: ALU Carry/Borrow bit
1 = A carry out from the Most Significant bit of the result occurred
0 = No carry out from the Most Significant bit of the result occurred
IPL1
of the result occurred
SR: ALU STATUS REGISTER
U-0
—
(2)
(1)
W = Writable bit
R/W-0, HSC
HSC = Hardware Settable/Clearable bit
‘1’ = Bit is set
IPL0
U-0
—
(2)
th
low-order bit (for byte-sized data) or 8
th
(1)
or 8
R-0, HSC R/W-0, HSC R/W-0, HSC R/W-0, HSC R/W-0, HSC
th
U-0
RA
low-order bit of the result has occurred
—
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U-0
—
N
(1,2)
U-0
OV
—
th
low-order bit (for word-sized data)
2010 Microchip Technology Inc.
x = Bit is unknown
U-0
—
Z
R/W-0, HSC
DC
C
bit 8
bit 0
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