DSPIC30F6014A-20E/PT Microchip Technology, DSPIC30F6014A-20E/PT Datasheet - Page 51

• Manufacturer Part Number: DSPIC30F6014A-20E/PT
• Description: IC DSPIC MCU/DSP 144K 80TQFP
• Manufacturer: Microchip Technology
• Series: dsPIC™ 30Fr

Specifications of DSPIC30F6014A-20E/PT

• Program Memory Type: FLASH
• Program Memory Size: 144KB (48K x 24)
• Package / Case: 80-TFQFP
• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 20 MIPS
• Connectivity: CAN, I²C, SPI, UART/USART
• Peripherals: AC'97, Brown-out Detect/Reset, I²S, LVD, POR, PWM, WDT
• Number Of I /o: 68
• Eeprom Size: 4K x 8
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 16x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Product: DSCs
• Data Bus Width: 16 bit
• Processor Series: DSPIC30F
• Core: dsPIC
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 68
• Data Ram Size: 8 KB
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52713-733, 52714-737, 53276-922, EWDSPIC
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE4000, DM240002, DM330011
• Minimum Operating Temperature: - 40 C
• Package: 80TQFP
• Device Core: dsPIC
• Family Name: dsPIC30
• Maximum Speed: 20 MHz
• Operating Supply Voltage: 3.3|5 V
• Interface Type: CAN/I2C/SPI/UART
• On-chip Adc: 16-chx12-bit
• Number Of Timers: 5
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DM300024 - KIT DEMO DSPICDEM 1.1XLT80PT3 - SOCKET TRAN ICE 80MQFP/TQFPAC164320 - MODULE SKT MPLAB PM3 80TQFPDM300004-2 - BOARD DEMO DSPICDEM.NET 2DM300004-1 - BOARD DEMO DSPICDEM.NET 1AC30F007 - MODULE SKT FOR DSPIC30F 80TQFP
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

11.11 Reading Configuration Memory
The procedure for reading configuration memory is
similar to the procedure for reading code memory,
except that 16-bit data words are read instead of 24-bit
words. Since there are seven Configuration registers,
they are read one register at a time.
TABLE 11-11:
© 2010 Microchip Technology Inc.
Step 1: Exit the Reset vector.
0000
0000
0000
Step 2: Initialize TBLPAG, and the read pointer (W6) and the write pointer (W7) for TBLRD instruction.
0000
0000
0000
0000
0000
Step 3: Read the Configuration register and write it to the VISI register (located at 0x784).
0000
0000
0000
0000
0000
Step 4: Output the VISI register using the REGOUT command.
0001
0000
Step 5: Reset device internal PC.
0000
0000
Step 6: Repeat steps 3-5 six times to read all of configuration memory.
Command
(Binary)
(Hexadecimal)
040100
040100
000000
200F80
880190
EB0300
EB0380
000000
BA0BB6
000000
000000
883C20
000000
<VISI>
000000
040100
000000
SERIAL INSTRUCTION EXECUTION FOR READING ALL CONFIGURATION MEMORY
Data
GOTO 0x100
GOTO 0x100
NOP
MOV
MOV
CLR
CLR
NOP
TBLRDL [W6++], [W7]
NOP
NOP
MOV
NOP
Clock out contents of VISI register
NOP
GOTO 0x100
NOP
#0xF8, W0
W0, TBLPAG
W6
W7
W0, VISI
Table 11-11
reading all of the configuration memory. Note that the
TBLPAG register is hard-coded to 0xF8 (the upper byte
address of configuration memory), and the read pointer
W6 is initialized to 0x0000.
Description
shows the ICSP programming details for
DS70102K-page 51