PIC14000-20/SS Microchip Technology, PIC14000-20/SS Datasheet - Page 3
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PIC14000-20/SS
Manufacturer Part Number
PIC14000-20/SS
Description
IC MCU OTP 4KX14 A/D 28SSOP
Manufacturer
Microchip Technology
Series
PIC® 14r
Datasheets
1.PIC16LF627A-IP.pdf
(8 pages)
2.PIC16F818-ISO.pdf
(6 pages)
3.PIC14000-04SO.pdf
(153 pages)
4.PIC14000-04SO.pdf
(5 pages)
Specifications of PIC14000-20/SS
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C
Peripherals
POR, Temp Sensor, WDT
Number Of I /o
20
Program Memory Size
7KB (4K x 14)
Program Memory Type
OTP
Ram Size
192 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 6 V
Data Converters
Slope A/D
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
28-SSOP
Processor Series
PIC14000
Core
PIC
Data Bus Width
8 bit
Data Ram Size
192 B
Interface Type
SPI, UART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
22
Number Of Timers
1
Operating Supply Voltage
2.7 V to 6 V
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
Development Tools By Supplier
ICE2000
Minimum Operating Temperature
0 C
On-chip Adc
14 bit
For Use With
309-1025 - ADAPTER 28-SSOP TO 28-DIP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
1. Module: Timer1 (Asynchronous Counter)
TABLE 1:
© 2007 Microchip Technology Inc.
When writing to the TMR1H register, under
specific conditions, it is possible that the TMR1L
register will miss a count while connected to the
external oscillator via the T1OSO and T1OSI pins.
When Timer1 is started, the circuitry looks for a
falling edge before a rising edge can increment the
counter. Writing to the TMR1H register is similar to
starting Timer1; therefore, the former logic stated
Work around
Operating Conditions: F
from Sleep, Timer1 interrupt enabled, global
interrupts enabled.
The code excerpts in Example 1, Example 2 and
Example 3 show how the TMR1H register can be
updated while the external clock (32.768 kHz) is
still on its high pulse.
40 MHz (PIC18)
16 MHz
20 MHz
FREQUENCY DEPENDENT INSTRUCTION EXECUTION AMOUNTS
1 MHz
2 MHz
4 MHz
8 MHz
F
OSC
OSC
≥ 4 MHz, no wake-ups
T
CY
0.25
0.5
0.2
0.1
4
2
1
(μs)
applies any time the TMR1H register is written. If
the TMR1H register is not completely written to
during the high pulse of the external clock, then the
TMR1L register will miss a count due to the circuit
operation stated previously. The high pulse of a
32.768 kHz external clock crystal yields a 15.25 μs
window for the write to TMR1H to occur. The
amount of instructions that can be executed within
this window is frequency dependent, as shown in
Table 1 below.
The importance of the code examples is that the
bold instructions are executed within the first
15.25 μs high pulse on the external clock after the
Timer1 overflow occurred. This will allow the
TMR1L register to increment correctly.
TIMER1 MODULE
T
CY
within 15.25 μs
15.25
76.25
152.5
3.81
7.63
30.5
61
DS80233C-page 3