PIC18LF6620T-I/PT Microchip Technology, PIC18LF6620T-I/PT Datasheet - Page 182

IC MCU FLASH 32KX16 LV 64-TQFP

PIC18LF6620T-I/PT

Manufacturer Part Number
PIC18LF6620T-I/PT
Description
IC MCU FLASH 32KX16 LV 64-TQFP
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18LF6620T-I/PT

Core Processor
PIC
Core Size
8-Bit
Speed
25MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
52
Program Memory Size
64KB (32K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
3.75K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TFQFP
Processor Series
PIC18LF
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3840 B
Interface Type
I2C, SPI, USART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
52
Number Of Timers
2 x 8 bit
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136, DM183022, DM183032
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18LF6620T-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
PIC18F6520/8520/6620/8620/6720/8720
17.4.5
The addressing procedure for the I
the first byte after the Start condition usually deter-
mines which device will be the slave addressed by the
master. The exception is the general call address,
which can address all devices. When this address is
used, all devices should, in theory, respond with an
Acknowledge.
The general call address is one of eight addresses
reserved for specific purposes by the I
consists of all ‘0’s with R/W = 0.
The general call address is recognized when the Gen-
eral Call Enable bit (GCEN) is enabled (SSPCON2<7>
set). Following a Start bit detect, 8 bits are shifted into
the SSPSR and the address is compared against the
SSPADD. It is also compared to the general call
address and fixed in hardware.
FIGURE 17-15:
DS39609B-page 180
GCEN (SSPCON2<7>)
SSPOV (SSPCON1<6>)
SDA
SCL
SSPIF
BF (SSPSTAT<0>)
GENERAL CALL ADDRESS
SUPPORT
S
SLAVE MODE GENERAL CALL ADDRESS SEQUENCE
(7 OR 10-BIT ADDRESS MODE)
1
2
General Call Address
2
C bus is such that
3
2
4
C protocol. It
5
6
7
R/W = 0
8
If the general call address matches, the SSPSR is
transferred to the SSPBUF, the BF flag bit is set (eighth
bit) and on the falling edge of the ninth bit (ACK bit), the
SSPIF interrupt flag bit is set.
When the interrupt is serviced, the source for the inter-
rupt can be checked by reading the contents of the
SSPBUF. The value can be used to determine if the
address was device specific or a general call address.
In 10-bit mode, the SSPADD is required to be updated
for the second half of the address to match and the UA
bit is set (SSPSTAT<1>). If the general call address is
sampled when the GCEN bit is set, while the slave is
configured in 10-bit Address mode, then the second
half of the address is not necessary, the UA bit will not
be set and the slave will begin receiving data after the
Acknowledge (Figure 17-15).
ACK
Address is compared to General Call Address
after ACK, set interrupt
9
D7
1
D6
2
Cleared in software
SSPBUF is read
Receiving Data
D5
3
D4
4
 2004 Microchip Technology Inc.
D3
5
D2
6
D1
7
D0
8
ACK
9
‘0’
‘1’

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