PIC17LC44-08I/P Microchip Technology, PIC17LC44-08I/P Datasheet - Page 33
![IC MCU OTP 8KX16 PWM 40DIP](/photos/6/61/66192/150-40-dip_sml.jpg)
PIC17LC44-08I/P
Manufacturer Part Number
PIC17LC44-08I/P
Description
IC MCU OTP 8KX16 PWM 40DIP
Manufacturer
Microchip Technology
Series
PIC® 17Cr
Specifications of PIC17LC44-08I/P
Core Processor
PIC
Core Size
8-Bit
Speed
8MHz
Connectivity
UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
33
Program Memory Size
16KB (8K x 16)
Program Memory Type
OTP
Ram Size
454 x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 6 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
40-DIP (0.600", 15.24mm)
Processor Series
PIC17LC
Core
PIC
Data Bus Width
8 bit
Data Ram Size
454 B
Interface Type
SCI, USART
Maximum Clock Frequency
33 MHz
Number Of Programmable I/os
33
Number Of Timers
8
Operating Supply Voltage
2 V to 6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
Development Tools By Supplier
ICE2000
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC17LC44-08I/PQ
Manufacturer:
Microchip Technology
Quantity:
10 000
Company:
Part Number:
PIC17LC44-08I/PT
Manufacturer:
MICROCHIP
Quantity:
10
Company:
Part Number:
PIC17LC44-08I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
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FIGURE 6-5:
Addr Unbanked
00h
01h
02h
03h
04h
05h
06h
07h
08h
09h
0Ah
0Bh
0Ch
0Dh
0Eh
0Fh
10h
11h
12h
13h
14h
15h
16h
17h
18h
1Fh
20h
FFh
Note 1: SFR file locations 10h - 17h are banked. All
1996 Microchip Technology Inc.
TBLPTRH
TBLPTRL
CPUSTA
PCLATH
ALUSTA
Purpose
Bank 0
RCREG
INTSTA
TMR0H
PORTB
TXREG
SPBRG
General
TMR0L
PORTA
RCSTA
WREG
TXSTA
other SFRs ignore the Bank Select Register
(BSR) bits.
T0STA
INDF0
INDF1
DDRB
FSR0
FSR1
RAM
BSR
PCL
PIC17C42 REGISTER FILE
MAP
Bank 1
PORTC
PORTD
PORTE
DDRC
DDRD
DDRE
PIR
PIE
(1)
PR3H/CA1H
PR3L/CA1L
Bank 2
TMR3H
TMR3L
TMR1
TMR2
PR1
PR2
(1)
Bank 3
PW1DCH
PW2DCH
PW1DCL
PW2DCL
TCON1
TCON2
CA2H
CA2L
(1)
FIGURE 6-6:
Addr Unbanked
00h
01h
02h
03h
04h
05h
06h
07h
08h
09h
0Ah
0Bh
0Ch
0Dh
0Eh
0Fh
10h
11h
12h
13h
14h
15h
16h
17h
18h
19h
1Ah
1Fh
20h
FFh
Note 1: SFR file locations 10h - 17h are banked. All
2: General Purpose Registers (GPR) locations
TBLPTRH
TBLPTRL
PCLATH
CPUSTA
ALUSTA
Bank 0
Purpose
RCREG
PRODH
General
RAM
INTSTA
TMR0H
PORTB
TXREG
SPBRG
PRODL
other SFRs ignore the Bank Select Register
(BSR) bits.
20h - FFh and 120h - 1FFh are banked. All
other GPRs ignore the Bank Select Register
(BSR) bits.
TMR0L
PORTA
RCSTA
WREG
TXSTA
T0STA
INDF0
INDF1
DDRB
FSR0
FSR1
BSR
PCL
(2)
PIC17CR42/42A/43/R43/44
REGISTER FILE MAP
Bank 1
Purpose
General
RAM
PORTC
PORTD
PORTE
DDRC
DDRD
DDRE
PIR
PIE
(2)
PIC17C4X
(1)
PR3H/CA1H
PR3L/CA1L
Bank 2
TMR3H
TMR3L
TMR1
TMR2
DS30412C-page 33
PR1
PR2
(1)
Bank 3
PW1DCH
PW2DCH
PW1DCL
PW2DCL
TCON1
TCON2
CA2H
CA2L
(1)
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