AT91RM9200-CJ-002 Atmel, AT91RM9200-CJ-002 Datasheet - Page 28

• Manufacturer Part Number: AT91RM9200-CJ-002
• Description: IC ARM MCU 16BIT 128K 256BGA
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91RM9200-CJ-002

• Core Processor: ARM9
• Core Size: 16/32-Bit
• Speed: 180MHz
• Connectivity: EBI/EMI, Ethernet, I²C, MMC, SPI, SSC, UART/USART, USB
• Peripherals: POR
• Number Of I /o: 122
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: ROM
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-BGA
• Processor Series: AT91Rx
• Core: ARM7TDMI
• Data Bus Width: 32 bit
• Data Ram Size: 16 KB
• Interface Type: 2-Wire, EBI, I2S, SPI, UART, USART
• Maximum Clock Frequency: 180 MHz
• Number Of Programmable I/os: 122
• Number Of Timers: 10 bit
• Operating Supply Voltage: 3 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: AT91SAM-ICE, AT91-ISP, AT91RM9200-EK
• Minimum Operating Temperature: - 40 C
• Cpu Family: 91R
• Device Core: ARM920T
• Device Core Size: 32b
• Frequency (max): 180MHz
• Total Internal Ram Size: 16KB
• # I/os (max): 122
• Number Of Timers - General Purpose: 6
• Operating Supply Voltage (typ): 1.8/3.3V
• Operating Supply Voltage (max): 1.95/3.6V
• Operating Supply Voltage (min): 1.65/3V
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 256
• Package Type: BGA
• For Use With: AT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

10.6
10.7
28
SDRAM Controller
Burst Flash Controller
AT91RM9200
• Multiple Wait State Management
• Numerous configurations supported
• Programming facilities
• Energy-saving capabilities
• Error detection
• SDRAM Power-up Initialization by software
• Latency is set to two clocks (CAS Latency of 1, 3 Not Supported)
• Auto Precharge Command not used
• Multiple Access Modes supported
• Adaptability to different device speed grades
• Adaptability to different device access protocols and bus interfaces
– Compliant with LCD Module
– Programmable Setup Time Read/Write
– Programmable Hold Time Read/Write
– Programmable Wait State Generation
– External Wait Request
– Programmable Data Float Time
– 2K, 4K, 8K Row Address Memory Parts
– SDRAM with two or four Internal Banks
– SDRAM with 16- or 32-bit Data Path
– Word, half-word, byte access
– Automatic page break when Memory Boundary has been reached
– Multibank Ping-pong Access
– Timing parameters specified by software
– Automatic refresh operation, refresh rate is programmable
– Self-refresh and Low-power Modes supported
– Refresh Error Interrupt
– Asynchronous or Burst Mode Byte, Half-word or Word Read Accesses
– Asynchronous Mode Half-word Write Accesses
– Programmable Burst Flash Clock Rate
– Programmable Data Access Time
– Programmable Latency after Output Enable
– Two Burst Read Protocols: Clock Control Address Advance or Signal Controlled
– Multiplexed or separate address and data buses
– Continuous Burst and Page Mode Accesses supported
Address Advance
1768MS–ATARM–09-Jul-09