ST7FLITEU05M6TR STMicroelectronics, ST7FLITEU05M6TR Datasheet - Page 39
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ST7FLITEU05M6TR
Manufacturer Part Number
ST7FLITEU05M6TR
Description
IC MCU 8BIT 2K FLASH 8SOIC
Manufacturer
STMicroelectronics
Series
ST7r
Datasheet
1.ST7FLITEU05M6.pdf
(139 pages)
Specifications of ST7FLITEU05M6TR
Core Processor
ST7
Core Size
8-Bit
Speed
8MHz
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
5
Program Memory Size
2KB (2K x 8)
Program Memory Type
FLASH
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2.4 V ~ 5.5 V
Data Converters
A/D 5x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
8-SOIC (3.9mm Width)
Processor Series
ST7FLITEUx
Core
ST7
Data Bus Width
8 bit
Data Ram Size
128 B
Interface Type
ICC
Maximum Clock Frequency
4 MHz
Number Of Programmable I/os
5
Number Of Timers
2
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
ST7FUS-PRIMER, ST7FLITE-SK/RAIS, ST7FLITU0-D/RAIS, STX-RLINK
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 5 Channel
For Use With
497-5858 - EVAL BOARD PLAYBACK ST7FLITE
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Connectivity
-
Lead Free Status / Rohs Status
Details
ST7LITEU05 ST7LITEU09
7.4.2
7.4.3
7.4.4
Figure 16. Reset block diagram
1. See “Illegal opcode reset” on page 92. for more details on illegal opcode reset conditions.
Asynchronous external RESET pin
The RESET pin is both an input and an open-drain output with integrated R
resistor. This pull-up has no fixed value but varies in accordance with the input voltage. It
can be pulled low by external circuitry to reset the device. See Electrical Characteristic
section for more details.
A Reset signal originating from an external source must have a duration of at least t
in order to be recognized (see
MCU can enter reset state even in Halt mode.
The RESET pin is an asynchronous signal which plays a major role in EMS performance. In
a noisy environment, it is recommended to follow the guidelines mentioned in the electrical
characteristics section.
External power-on reset
If the LVD is disabled by option byte, to start up the microcontroller correctly, the user must
ensure by means of an external reset circuit that the reset signal is held low until V
the minimum level specified for the selected f
A proper reset signal for a slow rising V
RC network connected to the RESET pin.
Internal low voltage detector (LVD) reset
Two different Reset sequences caused by the internal LVD circuitry can be distinguished:
●
●
The device RESET pin acts as an output that is pulled low when V
V
The LVD filters spikes on V
DD
<V
Power-on reset
Voltage drop reset
IT-
RESET
(falling edge) as shown in
V
DD
DD
R
ON
larger than t
Figure
Figure
FILTER
17). This detection is asynchronous and therefore the
DD
g(VDD)
supply can generally be provided by an external
17.
CLKIN
GENERATOR
PULSE
to avoid parasitic resets.
frequency.
Supply, reset and clock management
ILLEGAL OPCODE RESET
WATCHDOG RESET
LVD RESET
DD
<V
IT+
INTERNAL
RESET
ON
(rising edge) or
weak pull-up
DD
h(RSTL)in
is over
1)
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