ST7FLITEU09M6 STMicroelectronics, ST7FLITEU09M6 Datasheet - Page 94

MCU 8BIT SGL VOLT FLASH SO-8

ST7FLITEU09M6

Manufacturer Part Number
ST7FLITEU09M6
Description
MCU 8BIT SGL VOLT FLASH SO-8
Manufacturer
STMicroelectronics
Series
ST7r
Datasheet

Specifications of ST7FLITEU09M6

Core Processor
ST7
Core Size
8-Bit
Speed
8MHz
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
5
Program Memory Size
2KB (2K x 8)
Program Memory Type
FLASH
Eeprom Size
128 x 8
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2.4 V ~ 5.5 V
Data Converters
A/D 5x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
8-SOIC (3.9mm Width)
Processor Series
ST7FLITEUx
Core
ST7
Data Bus Width
8 bit
Data Ram Size
128 B
Interface Type
ICC
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
5
Number Of Timers
2
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
ST7FLITE-SK/RAIS, ST7FLITU0-D/RAIS, STX-RLINK
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 5 Channel
Cpu Family
ST7
Device Core Size
8b
Frequency (max)
8MHz
Total Internal Ram Size
128Byte
# I/os (max)
5
Number Of Timers - General Purpose
2
Operating Supply Voltage (typ)
5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
3.3V
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
8
Package Type
SO N
For Use With
497-5858 - EVAL BOARD PLAYBACK ST7FLITE
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Connectivity
-
Lead Free Status / Rohs Status
 Details

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Instruction set
Table 44.
94/139
Mnemo
JRUGT
JRULE
SWAP
PUSH
TRAP
NEG
NOP
RRC
XOR
MUL
POP
RCF
RSP
SBC
SRA
SUB
RET
RLC
SCF
SRL
TNZ
RIM
SLA
WFI
SIM
SLL
OR
LD
Shift right arithmetic
Push onto the stack
Reset Stack Pointer
Illegal opcode detection (continued)
Test for Neg & Zero
Negate (2's compl)
Jump if (C + Z = 0)
Jump if (C + Z = 1)
Pop from the stack
Subtract with carry
Rotate right true C
Shift left arithmetic
Disable interrupts
Subroutine return
Enable Interrupts
Rotate left true C
Wait for interrupt
Reset carry flag
Shift right logic
SWAP nibbles
OR operation
Set carry flag
Shift left logic
Exclusive OR
No operation
Description
Subtraction
S/W trap
Multiply
Load
Dst[7..4]<=>Dst[3..0]
Function/example
Dst7 => Dst => C
S = Max allowed
C <= Dst <= C
C => Dst => C
C <= Dst <= 0
C <= Dst <= 0
0 => Dst => C
A = A XOR M
A = A - M - C
S/W interrupt
Unsigned <=
Unsigned >
X,A = X * A
dst <= src
A = A + M
A = A - M
neg $10
pop reg
pop CC
tnz lbl1
push Y
C = 0
C = 1
I = 0
I = 1
A, X, Y
reg, M
reg, M
reg, M
reg, M
reg, M
reg, M
reg, M
reg, M
reg, M
Dst
reg
CC
M
A
A
A
A
reg, CC
X, Y, A
M, reg
Src
M
M
M
M
M
M
ST7LITEU05 ST7LITEU09
H
H
0
0
1
1
0
I
I
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
0
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
C
C
C
C
C
C
C
C
C
C
C
0
0
1

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