Z8F011AQB020SC Zilog, Z8F011AQB020SC Datasheet - Page 143

IC ENCORE XP MCU FLASH 1K 8-QFN

Z8F011AQB020SC

Manufacturer Part Number
Z8F011AQB020SC
Description
IC ENCORE XP MCU FLASH 1K 8-QFN
Manufacturer
Zilog
Series
Encore!® XP®r
Datasheets

Specifications of Z8F011AQB020SC

Core Processor
Z8
Core Size
8-Bit
Speed
20MHz
Connectivity
IrDA, UART/USART
Peripherals
Brown-out Detect/Reset, LED, LVD, POR, PWM, WDT
Number Of I /o
6
Program Memory Size
1KB (1K x 8)
Program Memory Type
FLASH
Eeprom Size
16 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
8-VQFN
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Data Converters
-
Other names
269-3645
Table 72. ADC Control/Status Register 1 (ADCCTL1)
BITS
FIELD
RESET
R/W
ADDR
PS022825-0908
ADC Control/Status Register 1
ADC Data High Byte Register
REFSELH
R/W
7
1
The ADC Control/Status Register 1 (ADCCTL1) configures the input buffer stage,
enables the threshold interrupts and contains the status of both threshold triggers. It is also
used to select the voltage reference configuration.
REFSELH—Voltage Reference Level Select High Bit; in conjunction with the Low bit
(REFSELL) in
reference; the following details the effects of {REFSELH, REFSELL}; this reference is
independent of the Comparator reference.
00= Internal Reference Disabled, reference comes from external pin
01= Internal Reference set to 1.0 V
10= Internal Reference set to 2.0 V (default)
11= Reserved
BUFMODE[2:0]
000 = Single-ended, unbuffered input
001 = Single-ended, buffered input with unity gain
010 = Reserved
011 = Reserved
100 = Differential, unbuffered input
101 = Differential, buffered input with unity gain
110 = Reserved
111 = Reserved
The ADC Data High Byte (ADCD_H) register contains the upper eight bits of the ADC
output. The output is an 13-bit two’s complement value. During a single-shot conversion,
this value is invalid. Access to the ADC Data High Byte register is read-only. Reading the
ADC Data High Byte register latches data in the ADC Low Bits register.
R/W
6
0
ADC Control Register
-
Input Buffer Mode Select
R/W
5
0
Reserved
R/W
4
0
0, this determines the level of the internal voltage
F71H
R/W
3
0
Z8 Encore! XP
R/W
2
0
Product Specification
BUFMODE[2:0]
Analog-to-Digital Converter
R/W
1
0
®
F082A Series
R/W
0
0
132

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