Z8F011AQB020EC Zilog, Z8F011AQB020EC Datasheet - Page 160

• Manufacturer Part Number: Z8F011AQB020EC
• Description: IC ENCORE XP MCU FLASH 1K 8-QFN
• Manufacturer: Zilog
• Series: Encore!® XP®r

Specifications of Z8F011AQB020EC

• Core Processor: Z8
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: IrDA, UART/USART
• Peripherals: Brown-out Detect/Reset, LED, LVD, POR, PWM, WDT
• Number Of I /o: 6
• Program Memory Size: 1KB (1K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 16 x 8
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 8-VQFN
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Data Converters: -
• Other names: 269-3644

Table 78. Flash Control Register (FCTL)
Flash Control Register Definitions
BITS
FIELD
RESET
R/W
ADDR
PS022825-0908
Flash Control Register
W
7
0
The Flash Controller must be unlocked using the Flash Control (FCTL) register before
programming or erasing the Flash memory. Writing the sequence
to the Flash Control register unlocks the Flash Controller. When the Flash Controller is
unlocked, the Flash memory can be enabled for Mass Erase or Page Erase by writing the
appropriate enable command to the FCTL. Page Erase applies only to the active page
selected in Flash Page Select register. Mass Erase is enabled only through the On-Chip
Debugger. Writing an invalid value or an invalid sequence returns the Flash Controller to
its locked state. The Write-only Flash Control Register shares its Register File address
with the read-only Flash Status Register.
FCMD—Flash Command
73H = First unlock command.
8CH = Second unlock command.
95H = Page Erase command (must be third command in sequence to initiate Page Erase).
63H = Mass Erase command (must be third command in sequence to initiate Mass Erase).
5EH = Enable Flash Sector Protect Register Access
W
6
0
W
5
0
W
4
0
FCMD
FF8H
W
3
0
Z8 Encore! XP
W
2
0
Product Specification
73H 8CH
W
1
0
®
F082A Series
, sequentially,
Flash Memory
W
0
0
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