ST7FLIT15BY0B6 STMicroelectronics, ST7FLIT15BY0B6 Datasheet - Page 138

• Manufacturer Part Number: ST7FLIT15BY0B6
• Description: IC MCU 8BIT 2K FLASH 16-DIP
• Manufacturer: STMicroelectronics
• Series: ST7r

Specifications of ST7FLIT15BY0B6

• Core Processor: ST7
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 11
• Program Memory Size: 2KB (2K x 8)
• Program Memory Type: FLASH
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 7x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 16-DIP (0.300", 7.62mm)
• Processor Series: ST7FLIT1x
• Core: ST7
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 17
• Number Of Timers: 4
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• Development Tools By Supplier: ST7FLITE-SK/RAIS, ST7MDT10-DVP3, ST7MDT10-EMU3, STX-RLINK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 7 Channel
• For Use With: 497-8427 - BOARD DEMO USB LI-ION ST7260E2497-5049 - KIT STARTER RAISONANCE ST7FLITE
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

ST7LITE1xB
COMMUNICATION INTERFACE CHARACTERISTICS (Cont’d)
Figure 108. SPI Slave Timing Diagram with CPHA=1
Figure 109. SPI Master Timing Diagram
Notes:
1. Measurement points are done at CMOS levels: 0.3xV
2. When no communication is on-going the data output line of the SPI (MOSI in master mode, MISO in slave mode) has
its alternate function capability released. In this case, the pin status depends of the I/O port configuration.
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MISO
MOSI
MISO
MOSI
SS
CPHA=1
CPOL=0
CPHA=1
CPOL=1
SS
OUTPUT
INPUT
CPHA = 0
CPOL = 0
CPHA = 0
CPOL = 1
CPHA = 1
CPOL = 0
CPHA = 1
CPOL = 1
INPUT
OUTPUT
INPUT
INPUT
see
note 2
See note 2
t
a(SO)
t
su(SS)
HZ
t
t
t
su(MI)
w(SCKH)
w(SCKL)
t
su(SI)
MSB OUT
MSB IN
MSB OUT
t
MSB IN
h(MI)
t
h(SI)
t
1)
c(SCK)
t
c(SCK)
t
t
t
v(MO)
w(SCKH)
w(SCKL)
t
v(SO)
DD
and 0.7xV
BIT6 OUT
BIT6 IN
BIT6 OUT
1)
DD
.
BIT1 IN
t
h(MO)
t
h(SO)
t
t
r(SCK)
f(SCK)
t
t
r(SCK)
f(SCK)
LSB OUT
LSB IN
LSB OUT
LSB IN
t
h(SS)
See note 2
t
dis(SO)
note 2
see