Z8F012ASB020EG Zilog, Z8F012ASB020EG Datasheet - Page 166

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Z8F012ASB020EG

Manufacturer Part Number
Z8F012ASB020EG
Description
IC ENCORE XP MCU FLASH 1K 8SOIC
Manufacturer
Zilog
Series
Encore!® XP®r
Datasheet

Specifications of Z8F012ASB020EG

Core Processor
Z8
Core Size
8-Bit
Speed
20MHz
Connectivity
IrDA, UART/USART
Peripherals
Brown-out Detect/Reset, LED, LVD, POR, PWM, Temp Sensor, WDT
Number Of I /o
6
Program Memory Size
1KB (1K x 8)
Program Memory Type
FLASH
Eeprom Size
16 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
8-SOIC (3.9mm Width)
Processor Series
Z8F012Ax
Core
eZ8
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
UART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
6
Number Of Timers
2
Operating Supply Voltage
2.7 V to 3.6 V
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Development Tools By Supplier
Z8F04A08100KITG, Z8F04A28100KITG, ZENETSC0100ZACG, ZENETSC0100ZACG, ZUSBOPTSC01ZACG, ZUSBSC00100ZAC, ZUSBSC00100ZACG
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 4 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
269-4038
Z8F012ASB020EG
Table 84. Trim Bit Address Register (TRMADR)
Flash Option Bit Control Register Definitions
BITS
FIELD
RESET
R/W
ADDR
PS022825-0908
Reading the Flash Information Page
Trim Bit Address Register
R/W
7
0
Randomized Lot Identification Bits
As an optional feature, Zilog is able to provide a factory-programmed random lot
identifier. With this feature, all devices in a given production lot are programmed with the
same random number. This random number is uniquely regenerated for each successive
production lot and is not likely to be repeated.
The randomized lot identifier is a 32 byte binary value, stored in the Flash information
page (see
on page 166 for more details) and is unaffected by mass erasure of the device's Flash
memory.
The following code example shows how to read data from the Flash information area.
; get value at info address 60 (FE60h)
ldx FPS, #%80 ; enable access to flash info page
ld R0, #%FE
ld R1, #%60
ldc R2, @RR0 ; R2 now contains the calibration value
The Trim Bit Address (TRMADR) register contains the target address for an access to the
trim option bits
Reading the Flash Information Page
R/W
6
0
(Table
TRMADR - Trim Bit Address (00H to 1FH)
R/W
84).
5
0
R/W
4
0
FF6H
R/W
on page 155 and
3
0
Z8 Encore! XP
R/W
2
0
Randomized Lot Identifier
Product Specification
R/W
1
0
®
F082A Series
Flash Option Bits
R/W
0
0
155

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