ST7FLITE35F2B6 STMicroelectronics, ST7FLITE35F2B6 Datasheet - Page 163
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ST7FLITE35F2B6
Manufacturer Part Number
ST7FLITE35F2B6
Description
IC MCU 8BIT 8K FLASH 20DIP
Manufacturer
STMicroelectronics
Series
ST7r
Specifications of ST7FLITE35F2B6
Core Processor
ST7
Core Size
8-Bit
Speed
8MHz
Connectivity
LINSCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
15
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
384 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 7x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-DIP (0.300", 7.62mm)
Processor Series
ST7FLITE3x
Core
ST7
Data Bus Width
8 bit
Data Ram Size
384 B
Interface Type
LINSCI, SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
15
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
Development Tools By Supplier
ST7FLITE-SK/RAIS, ST7MDT10-DVP3, ST7MDT10-EMU3, STX-RLINK
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 7 Channel
For Use With
497-5858 - EVAL BOARD PLAYBACK ST7FLITE497-5085 - EVAL BOARD UNIV MOTOR CONTROL497-5049 - KIT STARTER RAISONANCE ST7FLITE
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
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Table 110. PWMART_PWM_Mode
Note: The table given below shows data to be loaded in ARR register for different PWM signal
Function Name
Function Prototype
Behaviour Description
Input Parameter 1
Input Parameter 2
Input Parameter 3
Output Parameters
Required Preconditions
Functions called
Postconditions
See also
fcounter=125kHz gives a time base range of [8µs to 2.04ms]
fcounter=62.5kHz gives a time base range of [16µs to 4.08ms]
Void PWMART_PWM_Mode(Pwmart_Pwm
SELECT_Pin,Pwmart_Output POLARITY,unsigned char
Dutycycle_Data)
Selection of PWM pin, polarity and duty cycle. You have to
call this function more than once to generate several PWM
signals.
PWMART_Pin
Pin=0 PWM signal on PWM0 port pin.
Pin=1 PWM signal on PWM1 port pin.
Pin=2 PWM signal on PWM2 port pin.
Pin=3 PWM signal on PWM3 port pin.
PWMART_POLARITY_0
PWM output level is low, for Counter value >
Dutycycle_Data
PWM output level is high, for Counter value <=
Dutycycle_Data
PWMART_POLARITY_1
PWM output level is high, for Counter value >
Dutycycle_Data
PWM output level is low, for Counter value <=
Dutycycle_Data
Dutycycle_Data
Data to be loaded in corresponding OCR register (0x00 to
0xFFh).
Note: This value must be greater than the ARR register
value loaded through PWMART_Enable function. Refer to
the table given below.
None
PWMART_Counter_Enable must have beeb called
None
None
PWMART_PWM_Mode
PWM signal is generated on the selected pin.
Function Descriptions
163/235
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