Z8F1621VN020SC00TR Zilog, Z8F1621VN020SC00TR Datasheet - Page 175
Z8F1621VN020SC00TR
Manufacturer Part Number
Z8F1621VN020SC00TR
Description
IC ENCORE MCU FLASH 16K 44PLCC
Manufacturer
Zilog
Series
Encore!® XP®r
Specifications of Z8F1621VN020SC00TR
Core Processor
Z8
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, IrDA, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
31
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
44-LCC (J-Lead)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Other names
Z8F1621VN020SC00T
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Direct Memory Access Controller
Operation
PS019921-0308
DMA0 and DMA1 Operation
Configuring DMA0 and DMA1 for Data Transfer
The Z8 Encore! XP
three independent Direct Memory Access channels. Two of the channels (DMA0 and
DMA1) transfer data between the on-chip peripherals and the Register File. The third
channel (DMA_ADC) controls the ADC operation and transfers SINGLE-SHOT mode
ADC output data to the Register File.
DMA0 and DMA1, referred to collectively as DMAx, transfer data either from the on-chip
peripheral control registers to the Register File, or from the Register File to the on-chip
peripheral control registers. The sequence of operations in a DMAx data transfer is:
1. DMAx trigger source requests a DMA data transfer.
2. DMAx requests control of the system bus (address and data) from the eZ8 CPU.
3. After the eZ8 CPU acknowledges the bus request, DMAx transfers either a single byte
4. If Current Address equals End Address:
Follow the steps below to configure and enable DMA0 or DMA1:
1. Write to the DMAx I/O Address register to set the Register File address identifying the
2. Determine the 12-bit Start and End Register File addresses. The 12-bit Start Address
or a two-byte word (depending upon configuration) and then returns system bus
control back to the eZ8 CPU.
–
–
–
If Current Address does not equal End Address, the Current Address increments by 1
(single-byte transfer) or 2 (two-byte word transfer).
on-chip peripheral control register. The upper nibble of the 12-bit address for on-chip
peripheral control registers is always
is given by {DMAx_H[3:0], DMA_START[7:0]}. The 12-bit End Address is given by
{DMAx_H[7:4], DMA_END[7:0]}.
DMAx reloads the original Start Address
If configured to generate an interrupt, DMAx sends an interrupt request to the
Interrupt Controller
If configured for single-pass operation, DMAx resets the DEN bit in the DMAx
Control register to 0 and the DMA is disabled.
®
F64XX Series Direct Memory Access (DMA) Controller provides
FH
. The full address is {FH, DMAx_IO[7:0]}.
Z8 Encore! XP
Direct Memory Access Controller
Product Specification
®
F64XX Series
161
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