Z8F3222VS020SG Zilog, Z8F3222VS020SG Datasheet - Page 18

• Manufacturer Part Number: Z8F3222VS020SG
• Description: IC ENCORE MCU FLASH 32K 68PLCC
• Manufacturer: Zilog
• Series: Encore!® XP®r

Specifications of Z8F3222VS020SG

• Core Processor: Z8
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, IrDA, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 46
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 68-LCC (J-Lead)
• Processor Series: Z8F322x
• Core: eZ8
• Data Bus Width: 8 bit
• Data Ram Size: 2 KB
• Interface Type: I2C, SPI, UART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 46
• Number Of Timers: 4
• Operating Supply Voltage: 3 V to 3.6 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: 0 C
• On-chip Adc: 10 bit, 12 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 269-4263; Z8F3222VS020SG

PS019921-0308
General-Purpose Input/Output
Flash Controller
10-Bit Analog-to-Digital Converter
UARTs
The eZ8 CPU features include:
•
•
•
•
•
•
•
•
•
•
•
For more information on the eZ8 CPU, refer to eZ8
available for download at www.zilog.com.
The Z8 Encore! XP
port (Port H) for general-purpose input/output (GPIO). Each pin is individually
programmable. All ports (except B and H) support 5 V-tolerant inputs.
The Flash Controller programs and erases the Flash memory.
The Analog-to-Digital Converter converts an analog input signal to a 10-bit binary
number. The ADC accepts inputs from up to 12 different analog input sources.
Each UART is full-duplex and capable of handling asynchronous data transfers. The
UARTs support 8- and 9-bit data modes, selectable parity, and an efficient bus transceiver
Driver Enable signal for controlling a multi-transceiver bus, such as RS-485.
Direct register-to-register architecture allows each register to function as an
accumulator, improving execution time and decreasing the required Program Memory
Software stack allows much greater depth in subroutine calls and interrupts than
hardware stacks
Compatible with existing Z8 code
Expanded internal Register File allows access of up to 4 KB
New instructions improve execution efficiency for code developed using higher-level
programming languages, including C
Pipelined instruction fetch and execution
New instructions for improved performance including BIT, BSWAP, BTJ, CPC, LDC,
LDCI, LEA, MULT, and SRL
New instructions support 12-bit linear addressing of the Register File
Up to 10 MIPS operation
C-Compiler friendly
2 to 9 clock cycles per instruction
®
F64XX Series feature seven 8-bit ports (Ports A-G) and one 4-bit
™
CPU Core User Manual (UM0128)
Z8 Encore! XP
Product Specification
®
F64XX Series
Introduction
4