EZ80F93AZ020SC00TR Zilog, EZ80F93AZ020SC00TR Datasheet
EZ80F93AZ020SC00TR
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EZ80F93AZ020SC00TR Summary of contents
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... Flash memory. Workarounds 1. Execution of row programming from Flash memory is not supported executing a Flash ERASE from RAM or external memory, the user Copyright ©2010 by ZiLOG, Inc. All rights reserved. Product Update Errata for eZ80F92 and eZ80F93 MCUs 3 ...
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Table 1. Errata to eZ80F92 and eZ80F93 Devices (Continued) No Issue Detailed Description 4 A pulse on the SCL line A pulse on the SCL line prior to a START condition or after a STOP 2 when the I C ...
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Table 1. Errata to eZ80F92 and eZ80F93 Devices (Continued) No Issue Detailed Description 6 GPIO edge-trigger For edge triggered interrupts (Mode 6 and Mode 9), erroneous logic interrupt mapping error dependencies for the interrupt clearing logic exist on all port ...
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Table 1. Errata to eZ80F92 and eZ80F93 Devices (Continued) No Issue Detailed Description (continued from previous page) PB3 Input, falling or rising edge interrupt, depending on hardware PB4 Input (not used) PB5 Input, falling edge interrupt PB6 Input, dual edge ...
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Table 1. Errata to eZ80F92 and eZ80F93 Devices (Continued) No Issue Detailed Description 7 The UART is continually The root cause of this issue has been duplicated with certain signal interrupting; the user conditions after which a software instruction was ...
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Table 1. Errata to eZ80F92 and eZ80F93 Devices (Continued) No Issue Detailed Description (continued Ignore any data trapped in the Rx fifo */ while( Lsr & LSR_DR ) { Lsr = BSP_RD32( pUart->Base | UART_REG_RBR ); Lsr = ...
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... TECHNOLOGY DESCRIBED HEREIN OR OTHERWISE. The information contained within this document has been verified according to the general principles of electrical and mechanical engineering. Z8, Z8 Encore!, Z8 Encore! XP, Z8 Encore! MC, Crimzon, eZ80, eZ80Acclaim! and ZNEO are trademarks or registered trademarks of ZiLOG, Inc. All other product or service names are the property of their respective owners. UP004909-0910 ...