Z86C9620VSG Zilog, Z86C9620VSG Datasheet - Page 13

IC Z8 20MHZ C91 W/7 PORTS 68PLCC

Z86C9620VSG

Manufacturer Part Number
Z86C9620VSG
Description
IC Z8 20MHZ C91 W/7 PORTS 68PLCC
Manufacturer
Zilog
Series
Z8®r
Datasheet

Specifications of Z86C9620VSG

Core Processor
Z8
Core Size
8-Bit
Speed
20MHz
Connectivity
EBI/EMI, UART/USART
Number Of I /o
52
Program Memory Type
ROMless
Ram Size
236 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
68-PLCC
Processor Series
Z86C9xx
Core
Z8
Data Bus Width
8 bit
Program Memory Size
16 KB
Data Ram Size
236 B
Interface Type
UART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
52
Number Of Timers
2
Operating Supply Voltage
3 V to 5.5 V
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
0 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Peripherals
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
Z86C9620VSG
Manufacturer:
Zilog
Quantity:
10 000
Zilog
AC CHARACTERISTICS
External I/O or Memory Read and Write Timing
Z86C61/62/96 (16 MHz)
Notes:
Standard Test Load
All timing references use 2.0 V for a logic 1 and 0.8 V for a logic 0.
DS97Z8X1600
1. When using extended memory timing add 2 TpC.
2. Timing numbers given are for minimum TpC.
3. See clock cycle dependent characteristics table.
No
10
11
12
13
14
15
16
17
18
1
2
3
4
5
6
7
8
9
Number
TdA(AS)
TdAS(A)
TdAS(DR)
TwAS
TdAZ(DS)
TwDSR
TwDSW
TdDSR(DR)
ThDR(DS)
TdDS(A)
TdDS(AS)
TdR/W(AS)
TdDS(R/W)
TdDW(DSW)
TdDS(DW)
TdA(DR)
TdAS(DS)
TdDM(AS)
1
2
3
4
6
7
Table 5. Clock Dependent Formulas
Symbol
TdA(AS)
TdAS(A)
TdAS(DR)
TwAS
TwDSR
TwDSW
Address Valid to /AS rise Delay
/AS rise to Address Float Delay
/AS rise to Read Data Req’d Valid
/AS Low Width
Address Float to /DS fall
/DS (Read) Low Width
/DS (Write) Low Width
/DS fall to Read Data Req’d Valid
Read Data to /DS rise Hold Time
/DS rise to Address Active Delay
/DS rise to /AS fall Delay
R//W Valid to /AS rise Delay
/DS rise to R//W Not Valid
Write Data Valid to /DS fall (Write)
Delay
/DS rise to Write Data Not Valid
Delay
Address Valid to Read Data Req’d
Valid
/AS rise to /DS fall Delay
/DM Valid to /AS rise Delay
Symbol
Parameter
0.40 TpC + 0.32
0.59 TpC – 3.25
2.83 TpC + 6.14
0.66 TpC – 1.65
2.33 TpC – 10.56
1.27 TpC + 1.67
Equation
PS003501-0301
P R E L I M I N A R Y
Min
T
25
35
75
25
40
80
50
35
25
35
25
35
45
0
0
A
16 MHz
+70°C
= 0°C to
Number
Max
150
135
210
10
11
12
13
14
15
16
17
18
8
Table 5. Clock Dependent Formulas
Min
T
25
35
40
80
75
50
35
25
35
25
35
45
25
A
0
0
TdDSR(DR)
TdDS(A)
TdDS(AS)
TdR/W(AS)
TdDS(R/W)
TdDW(DSW)
TdDS(DW)
TdA(DR)
TdAS(DS)
TdDM(AS)
16 MHz
+105°C
= -40°C to
Symbol
Max
150
135
210
CMOS Z8 Microcontroller
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
1.97 TpC – 42.5
0.8 TpC
0.59 TpC – 3.14
0.4 TpC
0.8 TpC – 15
0.4 TpC
0.88 TpC – 19
4 TpC – 20
0.91 TpC – 10.7
0.9 TpC – 26.3
Notes
Equation
Z86C61/62/96
1,2,3
1,2,3
1,2,3
1,2,3
1,2,3
2,3
2,3
2,3
2,3
2,3
2,3
2,3
2,3
2,3
2,3
2,3
2,3
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