ST72F321R6TC STMicroelectronics, ST72F321R6TC Datasheet - Page 81

IC MCU 8BIT 32K FLASH 64-TQFP

ST72F321R6TC

Manufacturer Part Number
ST72F321R6TC
Description
IC MCU 8BIT 32K FLASH 64-TQFP
Manufacturer
STMicroelectronics
Series
ST7r
Datasheet

Specifications of ST72F321R6TC

Core Processor
ST7
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
48
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
3.8 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
64-TQFP, 64-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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Part Number:
ST72F321R6TC
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Part Number:
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0
16-BIT TIMER (Cont’d)
10.4.4 Low Power Modes
10.4.5 Interrupts
Note: The 16-bit Timer interrupt events are connected to the same interrupt vector (see Interrupts chap-
ter). These events generate an interrupt if the corresponding Enable Control Bit is set and the interrupt
mask in the CC register is reset (RIM instruction).
10.4.6 Summary of Timer Modes
1) See note 4 in
2) See note 5 in
3) See note 4 in
WAIT
HALT
Input Capture 1 event/Counter reset in PWM mode
Input Capture 2 event
Output Compare 1 event (not available in PWM mode)
Output Compare 2 event (not available in PWM mode)
Timer Overflow event
Input Capture (1 and/or 2)
Output Compare (1 and/or 2)
One Pulse Mode
PWM Mode
Mode
MODES
No effect on 16-bit Timer.
Timer interrupts cause the device to exit from WAIT mode.
16-bit Timer registers are frozen.
In HALT mode, the counter stops counting until Halt mode is exited. Counting resumes from the previous
count when the MCU is woken up by an interrupt with “exit from HALT mode” capability or from the counter
reset value when the MCU is woken up by a RESET.
If an input capture event occurs on the ICAPi pin, the input capture detection circuitry is armed. Consequent-
ly, when the MCU is woken up by an interrupt with “exit from HALT mode” capability, the ICFi bit is set, and
the counter value present when exiting from HALT mode is captured into the ICiR register.
Section 0.1.3.5 One Pulse Mode
Section 0.1.3.5 One Pulse Mode
Section 0.1.3.6 Pulse Width Modulation Mode
Interrupt Event
Input Capture 1
Yes
No
Not Recommended
Not Recommended
Input Capture 2
Description
Yes
TIMER RESOURCES
ST72321Rx ST72321ARx ST72321Jx
1)
3)
Output Compare 1 Output Compare 2
Event
OCF1
OCF2
ICF1
ICF2
Flag
TOF
Yes
No
Control
Enable
OCIE
TOIE
ICIE
Bit
from
Wait
Exit
Yes
Partially
Yes
No
from
Halt
Exit
81/193
2)
No

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