ST92F124R9TB STMicroelectronics, ST92F124R9TB Datasheet - Page 101

• Manufacturer Part Number: ST92F124R9TB
• Description: IC MCU 8BIT 64K MEMORY 64-LQFP
• Manufacturer: STMicroelectronics
• Series: ST9r

Specifications of ST92F124R9TB

• Core Processor: ST9
• Core Size: 8/16-Bit
• Speed: 24MHz
• Connectivity: I²C, SCI, SPI
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 48
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 64-LQFP
• Processor Series: ST92F12x
• Core: ST9
• Data Bus Width: 8 bit, 16 bit
• Data Ram Size: 6 KB
• Interface Type: CAN, I2C, SCI, SPI
• Maximum Clock Frequency: 24 MHz
• Number Of Programmable I/os: 80
• Number Of Timers: 16 bit
• Operating Supply Voltage: 4.5 V to 5.5 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: ST92F150-EPB
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

EXTERNAL INTERRUPTS (Cont’d)
Figure 51. External Interrupt Control Bits and Vectors
* Only four interrupt pins are available. Refer to
INT 5 pin*
INT 3 pin*
INT 4 pin*
INT 6 pin
INT 0 pin*
INT 2 pin*
INT 1 pin*
NMI
WKUP
(0:15)
TEC0
TEC1
TEA0
TEA1
TEB0
TEB1
TED0
Watchdog/Timer
Controller
Wake-up
STIM Timer
End of count
E
EFT1 Timer
3 TM
EFT0 Timer
RCCU
SPI
/Flash
INT_SEL
EFTIS
SPIS
EFTIS
FEIEN
ID1S
IA0S
“1”
INTS
“0”
“0”
“1”
“1”
“1”
“1”
“0”
“0”
“0”
“0”
“1”
“0”
“1”
“1”
“0”
Table 19
for I/O pin mapping.
VECTOR
VECTOR
VECTOR
VECTOR
VECTOR
VECTOR
VECTOR
VECTOR
Priority level
Priority level
Priority level
Mask bit IMB0
Priority level
Mask bit IMB1
Priority level
Mask bit IMD0
Mask bit
Mask bit
Priority level
Mask bit IMC0
Mask bit IMC1
Priority level
Priority level
Mask bit IMD1
ST92F124/F150/F250 - INTERRUPTS
IMA0
IMA1
V7 V6 V5 V4 0 0 1 X
V7 V6 V5 V4 0 1 0 X
V7 V6 V5 V4 0 1 1 X
V7 V6 V5 V4 1 1 1 X
V7 V6 V5 V4 0 0 0 X
V7 V6 V5 V4 1 0 1 X
V7 V6 V5 V4 1 1 0 X
V7 V6 V5 V4 1 0 0 X
X
X
X
X
X
X
X
X
Pending bit IPD1
Pending bit
Pending bit
Pending bit IPB0
Pending bit IPC1
Pending bit IPD0
Pending bit IPB1
Pending bit IPC0
X
X
X
X
X
X
X
X
1
1
0
0
1
1
0
0
IPA0
IPA1
INT A1
INT D1
INT A0
request
INT B0
INT B1
request
INT C1
INT D0
request
request
request
INT C0
request
request
request
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