Z86E4312FSC Zilog, Z86E4312FSC Datasheet - Page 45

• Manufacturer Part Number: Z86E4312FSC
• Description: Z8 4K OTP 12 MHZ 44-PQFP
• Manufacturer: Zilog
• Series: Z8®r

Specifications of Z86E4312FSC

• Core Processor: Z8
• Core Size: 8-Bit
• Speed: 12MHz
• Connectivity: EBI/EMI
• Peripherals: POR, WDT
• Number Of I /o: 32
• Program Memory Size: 4KB (4K x 8)
• Program Memory Type: OTP
• Ram Size: 236 x 8
• Voltage - Supply (vcc/vdd): 3.5 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 44-LQFP
• Data Bus Width: 8 bit
• Data Ram Size: 236 B
• Maximum Clock Frequency: 12 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 2 bit
• Operating Supply Voltage: 3.5 V to 5.5 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: 0 C
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: No
• Other names: 269-1108

PS022901-0508
Port 1 can be placed in the high-impedance state along with Port 0, AS, DS, and R/W,
allowing the Z86E43/743/E44 to share common resources in multiprocessor and DMA
applications. In ROM mode, Port 1 is defined as input after reset.
Port 2 (P27-P20). Port 2 is an 8-bit, bidirectional, CMOS-compatible I/O port. These
eight I/O lines can be configured under software control as an input or output, indepen-
dently. All input buffers are Schmitt-triggered. Bits programmed as outputs can be glo-
bally programmed as either push-pull or open-drain. Low EMI output buffers can be
globally programmed by the software. When used as an I/O port, Port 2 can be placed
under handshake control. After reset, Port 2 is defined as an input.
Figure 19. Port 1 Configuration (Z86E43/743/E44 Only)
Open Drain
Open
Out
In
MCU
1.5
2.3 Hysteresis
R ~ ~ 500 kΩ
Handshake Controls
DAV1 and RDY1
(P33 and P34)
Port 2 (I/O)
CMOS Z8
Auto Latch
PAD
®
Product Specification
OTP Microcontrollers
Electrical Characteristics
41