ST10F273M-4T3 STMicroelectronics, ST10F273M-4T3 Datasheet - Page 181

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ST10F273M-4T3

Manufacturer Part Number
ST10F273M-4T3
Description
MCU 16BIT 512K FLASH 144-LQFP
Manufacturer
STMicroelectronics
Series
ST10r
Datasheet

Specifications of ST10F273M-4T3

Core Processor
ST10
Core Size
16-Bit
Speed
40MHz
Connectivity
ASC, CAN, EBI/EMI, I²C, SSC, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
111
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
36K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 24x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
144-MQFP, 144-PQFP
Processor Series
ST10F27x
Core
ST10
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

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ST10F273M
27
Revision history
Table 78.
03-May-2007
02-Jul-2007
Date
Document revision history
Revision
1
2
Initial release
Changed document status from Preliminary Data to Datasheet
Section 4: Memory organization on page
- changed size of B0TF from 8 to 4Kbytes
- removed ‘Flash Temporary Unprotection’ from X-Miscellaneous
features
Table 2: Summary of IFlash address range on page
of B0TF from 8 to 4Kbytes
Figure 6: Flash structure on page
to 4Kbytes
Table 5: Flash module sectorization (write operations, or ROMS1 = ‘1’)
on page
Section 14: A/D converter on page
cycles’ with ‘40630 CPU clock cycles’ in end of section
Section 21.1: Idle mode on page
Section 21.2: Power-down mode on page
changes
Table 57: DC characteristics on page
- changed max value and unit for I
- changed max value and unit for I
- changed test conditions and max values for I
- changed footnote link for symbol I
- changed footnote link for symbol I
Table 58: Flash characteristics on page
- modified Bank 0 program parameter and values
- removed Bank 1 program parameter and values
- modified Bank 0 erase parameter and values
- removed Bank 1 erase parameter and values
Section 24.7.4: Analog reference pins on page
changes
Table 62: On-chip clock generator selections on page
- changed external clock input range for f
- changed external clock input range for f
- replaced ‘CPU clock range of 1...60 MHz’ with ‘CPU clock range of
1...40 MHz’ in footnote 1
Added
Added
page 177
Section 25.1: ECOPACK® on page 177
Section 25.2: Mechanical data and package dimensions on
29: Changed B0TF address and size (8 to 4Kbytes)
Changes
108: Made minor text changes
27: Changed Test-Flash size from 8
PD1
PD3
P0H
P0L
71: Replaced ‘40.630 CPU clock
131:
from 1mA to 150µA
from 1.1mA to 200µA
136:
XTAL
XTAL
21:
108: Made minor text
x 5
x 1
SB2
141: Minor text editing
and updated content
Revision history
21: Changed size
148:
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