C8051T604-GM Silicon Laboratories Inc, C8051T604-GM Datasheet - Page 63

IC 8051 MCU 2K-EEPROM 11-QFN

C8051T604-GM

Manufacturer Part Number
C8051T604-GM
Description
IC 8051 MCU 2K-EEPROM 11-QFN
Manufacturer
Silicon Laboratories Inc
Series
C8051T60xr
Datasheet

Specifications of C8051T604-GM

Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
SMBus (2-Wire/I²C), UART/USART
Peripherals
POR, PWM, Temp Sensor, WDT
Number Of I /o
8
Program Memory Size
2KB (2K x 8)
Program Memory Type
OTP
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
11-QFN
Processor Series
C8051T6x
Core
8051
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
I2C, SMBus, UART
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
8
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051T600DK
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
For Use With
336-1404 - KIT DEV FOR C8051T60X MCU'S
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
Other names
336-1658-5

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
C8051T604-GM
Manufacturer:
Silicon Laboratories Inc
Quantity:
135
13.1. Comparator Multiplexer
C8051T600/1/2/3/4/5/6 devices include an analog input multiplexer to connect Port I/O pins to the compar-
ator inputs. The Comparator0 inputs are selected in the CPT0MX register (SFR Definition 13.3). The
CMX0P1–CMX0P0 bits select the Comparator0 positive input; the CMX0N1–CMX0N0 bits select the
Comparator0 negative input.
Important Note About Comparator Inputs: The Port pins selected as comparator inputs should be con-
figured as analog inputs in their associated Port configuration register, and configured to be skipped by the
Crossbar (for details on Port configuration, see Section “22.5. Special Function Registers for Accessing
and Configuring Port I/O” on page 118).
Figure 13.3. Comparator Input Multiplexer Block Diagram
P0.1
P0.3
P0.5
P0.7
P0.0
P0.2
P0.4
P0.6
CPT0MX
Rev. 1.2
CP0 +
CP0 -
C8051T600/1/2/3/4/5/6
+
-
VDD
GND
63

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