C8051F305-GMR Silicon Laboratories Inc, C8051F305-GMR Datasheet - Page 163

IC 8051 MCU 2K FLASH 11QFN

C8051F305-GMR

Manufacturer Part Number
C8051F305-GMR
Description
IC 8051 MCU 2K FLASH 11QFN
Manufacturer
Silicon Laboratories Inc
Series
C8051F30xr
Datasheets

Specifications of C8051F305-GMR

Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
SMBus (2-Wire/I²C), UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
8
Program Memory Size
2KB (2K x 8)
Program Memory Type
FLASH
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
11-VQFN
For Use With
336-1444 - ADAPTER PROGRAM TOOLSTICK F300
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
C8051F305-GMR
Manufacturer:
SILICONLABS/芯科
Quantity:
20 000
Company:
Part Number:
C8051F305-GMR
Quantity:
1 061
16.2.6. 16-Bit Pulse Width Modulator Mode
A PCA module may also be operated in 16-bit PWM mode. In this mode, the 16-bit capture/compare mod-
ule defines the number of PCA clocks for the low time of the PWM signal. When the PCA counter matches
the module contents, the output on CEXn is set to ‘1’; when the counter overflows, CEXn is set to ‘0’. To
output a varying duty cycle, new value writes should be synchronized with PCA CCFn match interrupts.
16-bit PWM Mode is enabled by setting the ECOMn, PWMn, and PWM16n bits in the PCA0CPMn register.
For a varying duty cycle, match interrupts should be enabled (ECCFn = 1 AND MATn = 1) to help synchro-
nize the capture/compare register writes. The duty cycle for 16-bit PWM Mode is given by Equation 16.3.
Important Note About Capture/Compare Registers: When writing a 16-bit value to the PCA0 Capture/
Compare registers, the low byte should always be written first. Writing to PCA0CPLn clears the ECOMn bit
to ‘0’; writing to PCA0CPHn sets ECOMn to ‘1’.
Using Equation 16.3, the largest duty cycle is 100% (PCA0CPn = 0), and the smallest duty cycle is
0.0015% (PCA0CPn = 0xFFFF). A 0% duty cycle may be generated by clearing the ECOMn bit to ‘0’.
PCA0CPLn
Write to
Reset
PCA0CPHn
Write to
0
ENB
ENB
1
W
P
M
1
6
n
1
E
C
O
M
n
PCA0CPMn
C
A
P
P
n
0 0 x 0
C
A
P
N
n
M
A
T
n
PCA Timebase
O
G
T
n
Equation 16.3. 16-Bit PWM Duty Cycle
W
P
M
n
E
C
C
F
n
x
Figure 16.9. PCA 16-Bit PWM Mode
DutyCycle
Enable
PCA0CPHn
PCA0H
=
16-bit Comparator
Rev. 2.9
---------------------------------------------------- -
65536 PCA0CPn
PCA0CPLn
PCA0L
65536
Overflow
C8051F300/1/2/3/4/5
match
S
R
SET
CLR
Q
Q
CEXn
Crossbar
Port I/O
163

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