C8051T612-GQ Silicon Laboratories Inc, C8051T612-GQ Datasheet - Page 208
![IC 8051 MCU 8K BYTE-PROG 32-LQFP](/photos/12/34/123409/c8051t612-gq_sml.jpg)
C8051T612-GQ
Manufacturer Part Number
C8051T612-GQ
Description
IC 8051 MCU 8K BYTE-PROG 32-LQFP
Manufacturer
Silicon Laboratories Inc
Series
C8051T61xr
Specifications of C8051T612-GQ
Program Memory Type
OTP
Program Memory Size
8KB (8K x 8)
Package / Case
32-LQFP
Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
POR, PWM, Temp Sensor, WDT
Number Of I /o
29
Ram Size
1.25K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 21x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
C8051T6x
Core
8051
Data Bus Width
8 bit
Data Ram Size
1.25 KB
Interface Type
I2C/SPI/UART
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
29
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051FT610DK
Minimum Operating Temperature
- 40 C
On-chip Adc
21-ch x 10-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1439
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
C8051T612-GQ
Manufacturer:
Silicon Laboratories Inc
Quantity:
10 000
Company:
Part Number:
C8051T612-GQR
Manufacturer:
Silicon Laboratories Inc
Quantity:
10 000
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C8051T610/1/2/3/4/5/6/7
27. C2 Interface
C8051T610/1/2/3/4/5/6/7 devices include an on-chip Silicon Labs 2-Wire (C2) debug interface to allow
EPROM programming and in-system debugging with the production part installed in the end application.
The C2 interface operates using only two pins: a bi-directional data signal (C2D), and a clock input
(C2CK). See the C2 Interface Specification for details on the C2 protocol.
27.1. C2 Interface Registers
The following describes the C2 registers necessary to perform EPROM programming functions through the
C2 interface. All C2 registers are accessed through the C2 interface as described in the C2 Interface Spec-
ification.
C2 Register Definition 27.1. C2ADD: C2 Address
208
Name
Reset
7:0 C2ADD[7:0] Write: C2 Address.
Bit
Type
Bit
Name
7
0
Selects the target Data register for C2 Data Read and Data Write commands accord-
ing to the following list.
Address
0x00
0x01
0x02
0xDF
0xBF
0xB7
0xAF
0xAE
0xA9
0xAA
0xAB
0xAC
Read: C2 Status
Returns status information on the current programming operation.
When the MSB (bit 7) is set to ‘1’, a read or write operation is in progress. All other
bits can be ignored by the programming tools.
6
0
Name
DEVICEID Selects the Device ID Register (read only)
REVID
DEVCTL
EPCTL
EPDAT
EPSTAT
EPADDRH Selects the C2 EPROM Address High Byte Register
EPADDRL Selects the C2 EPROM Address Low Byte Register
CRC0
CRC1
CRC2
CRC3
5
0
Description
Selects the Revision ID Register (read only)
Selects the C2 Device Control Register
Selects the C2 EPROM Programming Control Register
Selects the C2 EPROM Data Register
Selects the C2 EPROM Status Register
Selects the CRC0 Register
Selects the CRC1 Register
Selects the CRC2 Register
Selects the CRC3 Register
Rev 1.0
4
0
C2ADD[7:0]
R/W
Function
3
0
2
0
1
0
0
0
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