C8051F541-IM Silicon Laboratories Inc, C8051F541-IM Datasheet - Page 122

IC 8051 MCU 16K FLASH 32-QFN

C8051F541-IM

Manufacturer Part Number
C8051F541-IM
Description
IC 8051 MCU 16K FLASH 32-QFN
Manufacturer
Silicon Laboratories Inc
Series
C8051F54xr
Datasheets

Specifications of C8051F541-IM

Program Memory Type
FLASH
Program Memory Size
16KB (16K x 8)
Package / Case
32-QFN
Mfg Application Notes
LIN Bootloader AppNote
Core Processor
8051
Core Size
8-Bit
Speed
50MHz
Connectivity
SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
POR, PWM, Temp Sensor, WDT
Number Of I /o
25
Ram Size
1.25K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.25 V
Data Converters
A/D 25x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Processor Series
C8051F5x
Core
8051
Data Bus Width
8 bit
Data Ram Size
256 B
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
25
Operating Supply Voltage
1.8 V to 5.25 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051F540DK
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
336-1672 - BOARD PROTOTYPE W/C8051F540336-1669 - KIT DEVELOPMENT FOR C8051F540
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1673-5
C8051F54x
14.4.3. System Clock
1. If operating from an external crystal, be advised that crystal performance is susceptible to electrical
2. If operating from the external oscillator, switch to the internal oscillator during Flash write or erase
Additional Flash recommendations and example code can be found in ”AN201: Writing to Flash from Firm-
ware" available from the Silicon Laboratories web site.
SFR Definition 14.1. PSCTL: Program Store R/W Control
SFR Address = 0x8F; SFR Page = 0x00
122
Name
Reset
7:2
Bit
Type
1
0
Bit
interference and is sensitive to layout and to changes in temperature. If the system is operating in an
electrically noisy environment, use the internal oscillator or use an external CMOS clock.
operations. The external oscillator can continue to run, and the CPU can switch back to the external
oscillator after the Flash operation has completed.
Unused
PSWE
Name
PSEE
R
7
0
Read = 000000b, Write = don’t care.
Program Store Erase Enable.
Setting this bit (in combination with PSWE) allows an entire page of Flash program
memory to be erased. If this bit is logic 1 and Flash writes are enabled (PSWE is logic
1), a write to Flash memory using the MOVX instruction will erase the entire page that
contains the location addressed by the MOVX instruction. The value of the data byte
written does not matter.
0: Flash program memory erasure disabled.
1: Flash program memory erasure enabled.
Program Store Write Enable.
Setting this bit allows writing a byte of data to the Flash program memory using the
MOVX write instruction. The Flash location should be erased before writing data.
0: Writes to Flash program memory disabled.
1: Writes to Flash program memory enabled; the MOVX write instruction targets Flash
memory.
R
6
0
R
5
0
Rev. 1.1
R
4
0
Function
R
3
0
R
2
0
PSEE
R/W
1
0
PSWE
R/W
0
0

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