C8051F061-GQR Silicon Laboratories Inc, C8051F061-GQR Datasheet
C8051F061-GQR
Manufacturer Part Number
C8051F061-GQR
Description
IC 8051 MCU 64K FLASH 64TQFP
Manufacturer
Silicon Laboratories Inc
Series
C8051F06xr
Specifications of C8051F061-GQR
Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
CAN, SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
24
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
4.25K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 2x16b, 8x10b; D/A 2x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TQFP, 64-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
C8051F061-GQR
Manufacturer:
SILICON
Quantity:
2 100
Company:
Part Number:
C8051F061-GQR
Manufacturer:
Silicon Laboratories Inc
Quantity:
10 000
Analog Peripherals
Two 16-Bit ADCs
-
-
-
-
-
10-Bit ADC
-
-
-
Two 12-Bit DACs
-
Three Comparators
Internal Voltage Reference
Precision V
On-Chip JTAG Debug & Boundary Scan
-
-
-
-
-
Supply Voltage: 2.7 to 3.6 V
-
-
CAN 2.0B
CNVSTR0
CNVSTR1
±0.75 LSB INL; guaranteed no missing codes
Programmable throughput up to 1 Msps (each ADC)
Configurable as two single-ended or one differential ADC
DMA to XRAM or external memory interface
Data-dependent windowed interrupt generator
Programmable throughput up to 200 ksps
8 external inputs
Built-in temperature sensor (±3 °C)
Can synchronize outputs to timers for jitter-free waveform generation
On-chip debug circuitry facilitates full speed, non-intrusive in-system
debug (no emulator required)
Provides breakpoints, single stepping, watchpoints, stack monitor
Inspect/modify memory and registers
Superior performance to emulation systems using ICE-chips, target
pods, and sockets
IEEE1149.1 compliant boundary scan
Typical operating current: 10 mA at 25 MHz
Multiple power saving sleep and shutdown modes
VRGND0
VBGAP0
VRGND1
VBGAP1
MONEN
ADGND
XTAL1
XTAL2
VREF0
VREF1
AIN0G
AIN1G
DGND
DGND
DGND
AGND
AGND
AGND
AVDD
VREF
DAC0
DAC1
/RST
TMS
TDO
AIN0
AIN1
VDD
VDD
VDD
TCK
AV+
AV+
AV+
TDI
DD
Monitor/Brown-out Detector
VDD Monitor
Digital Power
Analog Power
25 MHz 2%
Oscillator
Oscillator
External
Internal
Circuit
JTAG
Logic
(12-Bit)
VREF
DAC0
ADGND
AVDD
Boundary Scan
WDT
Debug HW
(16-Bit)
1Msps
ADC1
(16-Bit)
1 Msps
ADC0
VREF2
System Clock
25 MIPS, 64 kB Flash, 16-Bit ADC, 64-Pin Mixed-Signal MCU
R
E
S
U
L
T
R
E
S
U
L
T
0
1
Reset
Copyright © 2004 by Silicon Laboratories
Σ
+
-
C
o
8
0
5
1
e
r
D
F
F
I
External Data
Memory Bus
DMA
256 byte
SFR Bus
FLASH
64 kB
RAM
RAM
4 kB
High-Speed 8051 µC Core
-
-
-
Memory
-
-
-
CAN Bus 2.0B
-
-
Digital Peripherals
-
-
-
-
-
-
Clock Sources
-
-
64-Pin TQFP
-
EMIF
Cntrl
Pipelined instruction architecture; executes 70% of instructions in 1 or 2
system clocks
Up to 25 MIPS throughput with 25 MHz system clock
Expanded interrupt handler
4352 bytes data RAM
64 kB Flash; in-system programmable in 1024-byte sectors (1024 bytes
are reserved)
External parallel data memory interface
32 message objects
”Mailbox" implementation only interrupts CPU when needed
24 port I/O; all are 5 V tolerant
Hardware SMBus™ (I2C™ compatible), SPI™, and two UART serial
ports available concurrently
Programmable 16-bit counter array with 6 capture/compare modules
5 general-purpose 16-bit counter/timers
Dedicated watchdog timer; bidirectional reset
Real-time clock mode using timers or PCA
Internal programmable 2% oscillator: up to 24.5 MHz
External oscillator: Crystal, RC, C, or Clock
Temperature Range: –40 to +85 °C
(32 Message Objects)
Timers 0,
SPI Bus
1, 2,3,4
Latches
UART0
UART1
SMBus
P0, P1,
P2, P3
PCA
CAN 2.0B
ADC
200 ksps
(10-Bit)
CP1
Data Latch
Ctrl Latch
O
C
R
S
S
B
A
R
Addr15-8
P4 Latch
P5 Latch
P6 Latch
P7 Latch
Addr7-0
CP0
CP2
+
C8051F061
-
A
M
U
X
8:1
+
+
-
-
P0
Drv
P1
Drv
P2
Drv
P3
Drv
P2.2
P2.3
Sensor
Temp
P2.6
P2.7
P2.4
P2.5
DRV
DRV
DRV
DRV
P4
P5
P6
P7
P0.0
P0.7
P1.0/AIN2.0
P1.7/AIN2.7
P2.0
P2.7
CTX
CRX
VREF2
6.15.2004
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C8051F061-GQR Summary of contents
Page 1
... SFR Bus 1, 2,3,4 P0, P1, P2 Latches FLASH CAN 2.0B (32 Message Objects) 256 byte r RAM RAM External Data Memory Bus EMIF + D Cntrl Σ I DMA Copyright © 2004 by Silicon Laboratories C8051F061 P0.0 P0 Drv P0 P1.0/AIN2 Drv P1.7/AIN2 P2 Drv P2 Drv CTX CRX VREF2 Temp A ADC Sensor ...
Page 2
... MAX (mm) (mm) (mm 1.20 A1 0.05 - 0.15 A2 0.95 - 1.05 b 0.17 0.22 0. 12. 10. 0. 12. 10.00 - Copyright © 2004 by Silicon Laboratories C8051F061 TYP MAX UNITS 3 0 µA 0.1 µA 25 MHz 16 bits ±0.75 ±2 LSB ±0.50 ±1 LSB ±0.5 ±1 LSB 103 104 dB 1 Msps VREF ...