COP8CCR9IMT7/NOPB National Semiconductor, COP8CCR9IMT7/NOPB Datasheet - Page 66

• Manufacturer Part Number: COP8CCR9IMT7/NOPB
• Description: IC MCU EEPROM 8BIT 32K 48-TSSOP
• Manufacturer: National Semiconductor
• Series: COP8™ 8Cr

Specifications of COP8CCR9IMT7/NOPB

• Core Processor: COP8
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: Microwire/Plus (SPI), UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 39
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 48-TSSOP
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 20 MHz
• Data Ram Size: 1 KB
• On-chip Adc: 10 bit, 16 channel
• Number Of Programmable I/os: 59
• Number Of Timers: 3
• Height: 0.9 mm
• Interface Type: SPI, USART
• Length: 12.5 mm
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 40 C
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 4.5 V
• Width: 6.1 mm
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: *COP8CCR9IMT7; *COP8CCR9IMT7/NOPB; COP8CCR9IMT7

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18.0 MICROWIRE/PLUS
19.0 Memory Map
All RAM, ports and registers (except A and PC) are mapped
into data memory address space.
0000 to 006F
0070 to 007F
xx80 to xx90
xx90
xx91
xx92
xx93
xx94
xx95
xx96
xx97
xx98 to xx9F
xxA0
xxA1
xxA2
xxA3
xxA4
xxA5
xxA6
S/ADD REG
Address
FIGURE 36. MICROWIRE/PLUS SPI Mode Interface Timing, Alternate SK Mode, SK Idle Phase being High
FIGURE 35. MICROWIRE/PLUS SPI Mode Interface Timing, Normal SK Mode, SK Idle Phase being High
On-Chip RAM bytes (112 bytes)
Unused RAM Address Space (Reads As
All Ones)
Unused RAM Address Space (Reads
Undefined Data)
Port E Data Register
Port E Configuration Register
Port E Input Pins (Read Only)
Reserved for Port E
Port F Data Register
Port F Configuration Register
Port F Input Pins (Read Only)
Reserved for Port F
Reserved
Port A Data Register
Port A Configuration Register
Port A Input Pins (Read Only)
Reserved for Port A
Port B Data Register
Port B Configuration Register
Port B Input Pins (Read Only)
Contents
(Continued)
66
xxA7
xxA8
xxA9
xxAA
xxAB
xxAC
xxAD
xxAE
xxAF
xxB0
xxB1
xxB2
xxB3
xxB4
xxB5
xxB6
xxB7
S/ADD REG
Address
Reserved for Port B
ISP Address Register Low Byte
(ISPADLO)
ISP Address Register High Byte
(ISPADHI)
ISP Read Data Register (ISPRD)
ISP Write Data Register (ISPWR)
Reserved
Reserved
Reserved
High Speed Timers Control Register
(HSTCR)
Timer T3 Lower Byte
Timer T3 Upper Byte
Timer T3 Autoload Register T3RA Lower
Byte
Timer T3 Autoload Register T3RA Upper
Byte
Timer T3 Autoload Register T3RB Lower
Byte
Timer T3 Autoload Register T3RB Upper
Byte
Timer T3 Control Register
Reserved
Contents
10137438
10137439