MAXQ7670ATL/V+ Maxim Integrated Products, MAXQ7670ATL/V+ Datasheet - Page 25

• Manufacturer Part Number: MAXQ7670ATL/V+
• Description: IC MCU W/10BIT ADC 40TQFN-EP
• Manufacturer: Maxim Integrated Products
• Series: MAXQ™r

Specifications of MAXQ7670ATL/V+

• Core Processor: RISC
• Core Size: 16-Bit
• Speed: 16MHz
• Connectivity: CAN, SPI
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 7
• Program Memory Size: 64KB (32K x 16)
• Program Memory Type: FLASH
• Ram Size: 1K x 16
• Voltage - Supply (vcc/vdd): 2.25 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 40-TQFN Exposed Pad
• Processor Series: MAXQ
• Core: RISC
• Data Bus Width: 16 bit
• Data Ram Size: 2 KB
• Interface Type: SPI, JTAG, CAN
• Maximum Clock Frequency: 16 MHz
• Number Of Timers: 1
• Operating Supply Voltage: 4.5 V to 5.25 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

frequency is limited to SYSCLK/2 in master mode and
SYSCLK/8 in slave mode. Figure 10 shows the function-
al diagram of the SPI port. Figures 1 and 2 illustrate the
timing parameters listed in the Electrical Characteristics
table.
The MAXQ7670 provides seven general-purpose digital
I/Os (GPIOs). Some of the GPIOs include an additional
special function (SF), such as a timer input/output. For
example, the state of P0.6/T0 is programmable to
depend on timer channel 0 logic. When used as a port,
each I/O is configurable for high-impedance, weak
pullup to DVDDIO or pulldown to GNDIO. At power-up,
Figure 10. SPI Functional Diagram
SPI INTERRUPT
SYSCLK
SFR DATA BUS
MSB (15)
______________________________________________________________________________________
General-Purpose Digital I/Os
/2 MASTER (MAX)
/8 SLAVE (MAX)
PGA, 64KB Flash, and CAN Interface
SPI CONTROL UNIT
SHIFT REGISTER
READ BUFFER
MAXQ7670
Microcontroller with 10-Bit ADC,
SHIFT CLK
LSB(0)
SCLK OUT
SCLK IN
MASTER/SLAVE SELECT
SPI ENABLE
7
SPI CONTRL REG (SPICN)
SPI CONTRL REG (SPICF)
SPI CONTRL REG (SPICK)
each GPIO is configured as an input with a pullup to
DVDDIO. In addition, each GPIO can be programmed
to cause an interrupt (on falling or rising edges). In stop
mode, use any interrupt to wake-up the device.
The port direction (PD) register determines the
input/output direction of each I/O. The port output (PO)
register contains the current state of the logic output
buffers. When an I/O is configured as an output, writing
to the PO register controls the output logic state.
Reading the PO register shows the current state of the
output buffers, independent of the data direction. The
port input (PI) register is a read-only register that
always reflects the logic state of the I/Os.
SLAVE
MASTER
MASTER
SLAVE
0
MASTER
SLAVE
DVDDIO
DVDDIO
MISO
MOSI
SS
SCLK
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