AT89C5122D-RDRIM Atmel, AT89C5122D-RDRIM Datasheet - Page 162

IC MCU 80C51 W/SMART CARD 64VQFP

AT89C5122D-RDRIM

Manufacturer Part Number
AT89C5122D-RDRIM
Description
IC MCU 80C51 W/SMART CARD 64VQFP
Manufacturer
Atmel
Series
89Cr
Datasheets

Specifications of AT89C5122D-RDRIM

Core Processor
8051
Core Size
8-Bit
Speed
48MHz
Connectivity
SmartCard, SPI, UART/USART, USB
Peripherals
LED, POR, WDT
Number Of I /o
46
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TQFP, 64-VQFP
For Use With
AT89STK-10 - KIT EVAL APPL MASS STORAGEAT89STK-03 - KIT STARTER FOR MCU AT8XC5122/23
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Data Converters
-
Other names
AT89C5122DRDRIMTR

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT89C5122D-RDRIM
Manufacturer:
Atmel
Quantity:
10 000
162
AT83R5122, AT8xC5122/23
Table 100. Interrupt Enable Register 1 - IEN1 (B1h) for AT83C5123
Reset Value = X0XX 0XXXb (Bit addressable)
Table 101. Interrupt Priority Low Register 0 - IPL0 (B8h)
Reset Value = X000 0000b (Bit addressable)
Number
Number
5 - 4
Bit
7 - 5
Bit
7
7
7
6
3
2
1
0
4
3
2
1
0
-
-
Mnemonic Description
Mnemonic Description
EUSB
EUSB
PX1L
PX0L
ESCI
PT1L
PT0L
PSL
Bit
Bit
6
6
-
-
-
-
-
Reserved
The value read from this bit is indeterminate. Do not change these bits.
Serial port Priority bit
Refer to PSH for priority level.
Timer 1 overflow interrupt Priority bit
Refer to PT1H for priority level.
External interrupt 1 Priority bit
Refer to PX1H for priority level.
Timer 0 overflow interrupt Priority bit
Refer to PT0H for priority level.
External interrupt 0 Priority bit
Refer to PX0H for priority level.
Reserved
The value read from this bit is indeterminate. Do not change this bit.
USB Interrupt Enable bit
Cleared to disable USB interrupt .
Set to enable USB interrupt.
Reserved
The value read from this bit is indeterminate. Do not change these bits.
SCI interrupt Enable bit
Cleared to disable SCIinterrupt .
Set to enable SCI interrupt.
Reserved
The value read from this bit is indeterminate. Do not change this bit.
Reserved
The value read from this bit is indeterminate. Do not change this bit.
Reserved
The value read from this bit is indeterminate. Do not change this bit.
5
5
-
-
PSL
4
4
-
PT1L
ESCI
3
3
PX1L
2
2
PT0L
1
1
-
4202F–SCR–07/2008
PX0L
0
0

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