PIC16C64/JW Microchip Technology, PIC16C64/JW Datasheet - Page 255
![MICRO CTRL 2K X 14 EPROM 40 CDIP](/photos/6/63/66338/150-40-cdip_sml.jpg)
PIC16C64/JW
Manufacturer Part Number
PIC16C64/JW
Description
MICRO CTRL 2K X 14 EPROM 40 CDIP
Manufacturer
Microchip Technology
Series
PIC® 16Cr
Specifications of PIC16C64/JW
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
33
Program Memory Size
3.5KB (2K x 14)
Program Memory Type
EPROM, UV
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 6 V
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
40-CDIP (0.600", 15.24mm) Window
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Data Converters
-
Other names
PIC16C64/JW-S1
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
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FIGURE 22-4: RESET, WATCHDOG TIMER, OSCILLATOR START-UP TIMER AND POWER-UP
FIGURE 22-5: BROWN-OUT RESET TIMING
TABLE 22-4:
Parameter
1997 Microchip Technology Inc.
*
†
Watchdog
I/O Pins
Time-out
Time-out
No.
31*
33*
Internal
30
32
34
35
Internal
RESET
RESET
MCLR
PWRT
Timer
POR
These parameters are characterized but not tested.
Data in "Typ" column is at 5V, 25˚C unless otherwise stated. These parameters are for design guidance only and are not
tested.
OSC
Note: Refer to Figure 22-1 for load conditions.
V
V
DD
DD
TmcL
Tpwrt
T
Sym
Twdt
Tost
T
BOR
IOZ
TIMER TIMING
RESET, WATCHDOG TIMER, OSCILLATOR START-UP TIMER, POWER-UP TIMER,
AND BROWN-OUT RESET REQUIREMENTS
Characteristic
MCLR Pulse Width (low)
Watchdog Timer Time-out Period
(No Prescaler)
Oscillation Start-up Timer Period
Power-up Timer Period
I/O Hi-impedance from MCLR Low
or WDT reset
Brown-out Reset Pulse Width
33
Applicable Devices 61 62 62A R62 63 R63 64 64A R64 65 65A R65 66 67
32
BV
Preliminary
DD
Min
100
—
28
—
2
7
34
1024 T
Typ†
30
18
72
—
—
—
OSC
35
Max
132
2.1
—
33
—
—
Units
31
ms
ms
—
s
s
s
V
V
T
V
V
PIC16C6X
OSC
DD
DD
DD
DD
= 5V, -40˚C to +125˚C
= 5V, -40˚C to +125˚C
= 5V, -40˚C to +125˚C
= OSC1 period
B
VDD
DS30234D-page 255
Conditions
34
(D005)
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