PIC16C74-10I/P Microchip Technology, PIC16C74-10I/P Datasheet - Page 71
![MICRO CTRL 4K 10MHZ OTP ET 40DIP](/photos/6/61/66192/150-40-dip_sml.jpg)
PIC16C74-10I/P
Manufacturer Part Number
PIC16C74-10I/P
Description
MICRO CTRL 4K 10MHZ OTP ET 40DIP
Manufacturer
Microchip Technology
Series
PIC® 16Cr
Datasheet
1.PIC16C72-04SO.pdf
(289 pages)
Specifications of PIC16C74-10I/P
Core Processor
PIC
Core Size
8-Bit
Speed
10MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
33
Program Memory Size
7KB (4K x 14)
Program Memory Type
OTP
Ram Size
192 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 6 V
Data Converters
A/D 8x8b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
40-DIP (0.600", 15.24mm)
Lead Free Status / RoHS Status
Request inventory verification / Request inventory verification
Eeprom Size
-
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10.0
Each CCP (Capture/Compare/PWM) module contains
a 16-bit register which can operate as a 16-bit capture
register, as a 16-bit compare register or as a PWM
master/slave Duty Cycle register. Both the CCP1 and
CCP2 modules are identical in operation, with the
exception of the operation of the special event trigger.
Table 10-1 and Table 10-2 show the resources and
interactions of the CCP module(s). In the following sec-
tions, the operation of a CCP module is described with
respect to CCP1. CCP2 operates the same as CCP1,
except where noted.
TABLE 10-2:
CCPx Mode CCPy Mode
Capture
Capture
Compare
PWM
PWM
PWM
1997 Microchip Technology Inc.
CAPTURE/COMPARE/PWM
MODULE(s)
Applicable Devices
72 73 73A 74 74A 76 77 CCP1
72 73 73A 74 74A 76 77 CCP2
Capture
Compare
Compare
PWM
Capture
Compare
INTERACTION OF TWO CCP MODULES
The PWMs will have the same frequency, and update rate (TMR2 interrupt).
Same TMR1 time-base.
The compare should be configured for the special event trigger, which clears TMR1.
The compare(s) should be configured for the special event trigger, which clears TMR1.
None
None
CCP1 module:
Capture/Compare/PWM Register1 (CCPR1) is com-
prised of two 8-bit registers: CCPR1L (low byte) and
CCPR1H (high byte). The CCP1CON register controls
the operation of CCP1. All are readable and writable.
CCP2 module:
Capture/Compare/PWM Register2 (CCPR2) is com-
prised of two 8-bit registers: CCPR2L (low byte) and
CCPR2H (high byte). The CCP2CON register controls
the operation of CCP2. All are readable and writable.
For use of the CCP modules, refer to the Embedded
Control Handbook, "Using the CCP Modules" (AN594).
TABLE 10-1:
Interaction
CCP Mode
Compare
Capture
PWM
CCP MODE - TIMER
RESOURCE
PIC16C7X
Timer Resource
DS30390E-page 71
Timer1
Timer1
Timer2
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