PIC16C54B-04I/P Microchip Technology, PIC16C54B-04I/P Datasheet - Page 35
![MICRO CTRL 512 4MHZ OTP 18DIP](/photos/6/76/67657/18-dip_300mil__sml.jpg)
PIC16C54B-04I/P
Manufacturer Part Number
PIC16C54B-04I/P
Description
MICRO CTRL 512 4MHZ OTP 18DIP
Manufacturer
Microchip Technology
Series
PIC® 16Cr
Specifications of PIC16C54B-04I/P
Core Processor
PIC
Core Size
8-Bit
Speed
4MHz
Peripherals
POR, WDT
Number Of I /o
12
Program Memory Size
768B (512 x 12)
Program Memory Type
OTP
Ram Size
25 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
18-DIP (0.300", 7.62mm)
Lead Free Status / RoHS Status
Request inventory verification / Request inventory verification
Eeprom Size
-
Data Converters
-
Connectivity
-
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The Electrical Specifications sections show RC
frequency variation from part to part due to normal
process variation.
Also, see the Electrical Specifications sections for
variation of oscillator frequency due to V
Rext/Cext values as well as frequency variation due to
operating temperature for given R, C, and V
The oscillator frequency, divided by 4, is available on
the OSC2/CLKOUT pin, and can be used for test
purposes or to synchronize other logic.
FIGURE 7-7:
Cext
V
1998 Microchip Technology Inc.
Note:
Rext
SS
V
DD
If you change from this device to
another device, please verify oscillator
characteristics in your application.
Fosc/4
RC OSCILLATOR MODE
OSC2/CLKOUT
OSC1
N
PIC16C5X
DD
DD
for given
Internal
clock
values.
Preliminary
7.3
PIC16C5X devices may be reset in one of the
following ways:
• Power-On Reset (POR)
• MCLR reset (normal operation)
• MCLR wake-up reset (from SLEEP)
• WDT reset (normal operation)
• WDT wake-up reset (from SLEEP)
Table 7-3 shows these reset conditions for the PCL
and STATUS registers.
Some registers are not affected in any reset condition.
Their status is unknown on POR and unchanged in
any other reset. Most other registers are reset to a
“reset state” on Power-On Reset (POR), MCLR or
WDT reset. A MCLR or WDT wake-up from SLEEP
also results in a device reset, and not a continuation of
operation before SLEEP.
The TO and PD bits (STATUS <4:3>) are set or
cleared depending on the different reset conditions
(Section 7.7). These bits may be used to determine
the nature of the reset.
Table 7-4 lists a full description of reset states of all
registers. Figure 7-8 shows a simplified block diagram
of the on-chip reset circuit.
Reset
PIC16C5X
DS30453B-page 35
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