PIC16C54B-20/SS Microchip Technology, PIC16C54B-20/SS Datasheet - Page 49
![MICRO CTRL 512 20MHZ OTP 20SSOP](/photos/6/58/65895/150-20-ssop_sml.jpg)
PIC16C54B-20/SS
Manufacturer Part Number
PIC16C54B-20/SS
Description
MICRO CTRL 512 20MHZ OTP 20SSOP
Manufacturer
Microchip Technology
Series
PIC® 16Cr
Specifications of PIC16C54B-20/SS
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Peripherals
POR, WDT
Number Of I /o
12
Program Memory Size
768B (512 x 12)
Program Memory Type
OTP
Ram Size
25 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
20-SSOP
Lead Free Status / RoHS Status
Request inventory verification / Request inventory verification
Eeprom Size
-
Data Converters
-
Connectivity
-
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INCF
Syntax:
Operands:
Operation:
Status Affected: Z
Encoding:
Description:
Words:
Cycles:
Example:
INCFSZ
Syntax:
Operands:
Operation:
Status Affected: None
Encoding:
Description:
Words:
Cycles:
Example:
1998 Microchip Technology Inc.
Before Instruction
After Instruction
Before Instruction
After Instruction
CNT
Z
CNT
Z
PC
CNT
if CNT
PC
if CNT
PC
Increment f
[ label ]
0
d
(f) + 1
The contents of register 'f' are incre-
mented. If 'd' is 0 the result is placed in
the W register. If 'd' is 1 the result is
placed back in register 'f'.
1
1
INCF
=
=
=
=
Increment f, Skip if 0
[ label ]
0
d
(f) + 1
The contents of register 'f' are incre-
mented. If 'd' is 0 the result is placed in
the W register. If 'd' is 1 the result is
placed back in register 'f'.
If the result is 0, then the next instruc-
tion, which is already fetched, is dis-
carded and an NOP is executed
instead making it a two cycle instruc-
tion.
1
1(2)
HERE
CONTINUE •
=
=
=
=
=
0010
0011
f
f
[0,1]
[0,1]
0xFF
0
0x00
1
address (HERE)
CNT + 1;
0,
address (CONTINUE);
0,
address (HERE +1)
31
31
CNT,
(dest)
(dest), skip if result = 0
INCF f,d
INCFSZ f,d
10df
11df
INCFSZ
GOTO
•
•
1
ffff
ffff
LOOP
CNT,
1
Preliminary
IORLW
Syntax:
Operands:
Operation:
Status Affected: Z
Encoding:
Description:
Words:
Cycles:
Example:
IORWF
Syntax:
Operands:
Operation:
Status Affected: Z
Encoding:
Description:
Words:
Cycles:
Example:
Before Instruction
After Instruction
Before Instruction
After Instruction
W
W
Z
RESULT =
W
RESULT =
W
Z
=
=
=
Inclusive OR literal with W
[ label ]
0
(W) .OR. (k)
The contents of the W register are
OR’ed with the eight bit literal 'k'. The
result is placed in the W register.
1
1
IORLW
0x9A
0xBF
0
Inclusive OR W with f
[ label ]
0
d
(W).OR. (f)
Inclusive OR the W register with regis-
ter 'f'. If 'd' is 0 the result is placed in
the W register. If 'd' is 1 the result is
placed back in register 'f'.
1
1
IORWF
=
=
=
1101
0001
k
f
[0,1]
0x13
0x91
0x13
0x93
0
31
255
0x35
IORLW k
IORWF
PIC16C5X
kkkk
00df
(dest)
(W)
RESULT, 0
DS30453B-page 49
kkkk
ffff
f,d
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