AT90S8515A-8PI Atmel, AT90S8515A-8PI Datasheet - Page 44
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AT90S8515A-8PI
Manufacturer Part Number
AT90S8515A-8PI
Description
IC MCU 8K FLSH 8MHZ IT 40DIP
Manufacturer
Atmel
Series
AVR® 90Sr
Datasheets
1.AT90S8515-4AC.pdf
(112 pages)
2.AT90S8515-4AC.pdf
(4 pages)
3.AT90S8515-4AC.pdf
(4 pages)
Specifications of AT90S8515A-8PI
Core Processor
AVR
Core Size
8-Bit
Speed
8MHz
Connectivity
SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 6 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
40-DIP (0.600", 15.24mm)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Data Converters
-
EEPROM Read/Write
Access
EEPROM Address Register –
EEARH and EEARL
EEPROM Data Register –
EEDR
EEPROM Control Register –
EECR
44
AT90S8515
The EEPROM access registers are accessible in the I/O space.
The write access time is in the range of 2.5 - 4 ms, depending on the V
self-timing function, however, lets the user software detect when the next byte can be
written. If the user code contains code that writes the EEPROM, some precaution must
be taken. In heavily filtered power supplies, V
up/down. This causes the device for some period of time to run at a voltage lower than
specified as minimum for the clock frequency used. CPU operation under these condi-
tions is likely cause the program counter to perform unintentional jumps and eventually
execute the EEPROM write code. To secure EEPROM integrity, the user is advised to
use an external under-voltage reset circuit in this case.
In order to prevent unintentional EEPROM writes, a specific write procedure must be fol-
lowed. Refer to the description of the EEPROM Control Register for details on this.
When the EEPROM is written, the CPU is halted for two clock cycles before the next
instruction is executed. When the EEPROM is read, the CPU is halted for four clock
cycles before the next instruction is executed.
The EEPROM address registers (EEARH and EEARL) specify the EEPROM address in
the 512-byte EEPROM space for AT90S8515. The EEPROM data bytes are addressed
linearly between 0 and 512.
• Bits 7..0 – EEDR7..0: EEPROM Data
For the EEPROM write operation, the EEDR register contains the data to be written to
the EEPROM in the address given by the EEAR register. For the EEPROM read opera-
tion, the EEDR contains the data read out from the EEPROM at the address given by
EEAR.
• Bits 7..3 – Res: Reserved Bits
These bits are reserved bits in the AT90S8515 and will always read as zero.
Bit
$1F ($3F)
$1E ($3E)
Read/Write
Initial Value
Bit
$1D ($3D)
Read/Write
Initial Value
Bit
$1C ($3C)
Read/Write
Initial Value
EEAR7
MSB
R/W
R/W
15
R
7
0
7
–
0
R
–
7
0
0
EEAR6
R/W
R/W
6
0
14
R
6
–
0
R
–
6
0
0
EEAR5
R/W
R/W
5
0
13
R
R
5
–
0
–
5
0
0
EEAR4
R/W
R/W
4
0
12
R
R
4
–
0
–
4
0
0
CC
EEAR3
R/W
R/W
3
0
11
R
R
3
–
0
–
3
0
0
is likely to rise or fall slowly on power-
R/W
EEMWE
EEAR2
2
0
R/W
R/W
10
R
–
2
0
0
2
0
R/W
EEAR1
1
0
EEWE
R/W
R/W
R
9
–
1
0
0
1
0
LSB
R/W
EEAR8
EEAR0
0
0
EERE
R/W
R/W
R/W
CC
8
0
0
0
0
0
voltages. A
0841G–09/01
EEDR
EECR
EEARH
EEARL