PIC16C56-RCE/P Microchip Technology, PIC16C56-RCE/P Datasheet - Page 54
![IC MCU OTP 1KX12 18DIP](/photos/6/76/67657/18-dip_300mil__sml.jpg)
PIC16C56-RCE/P
Manufacturer Part Number
PIC16C56-RCE/P
Description
IC MCU OTP 1KX12 18DIP
Manufacturer
Microchip Technology
Series
PIC® 16Cr
Datasheet
1.PIC16LC58B-04P.pdf
(194 pages)
Specifications of PIC16C56-RCE/P
Core Processor
PIC
Core Size
8-Bit
Speed
4MHz
Peripherals
POR, WDT
Number Of I /o
12
Program Memory Size
1.5KB (1K x 12)
Program Memory Type
OTP
Ram Size
25 x 8
Voltage - Supply (vcc/vdd)
3.25 V ~ 6 V
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
18-DIP (0.300", 7.62mm)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Connectivity
-
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PIC16C5X
BSF
Syntax:
Operands:
Operation:
Status Affected: None
Encoding:
Description:
Words:
Cycles:
Example:
BTFSC
Syntax:
Operands:
Operation:
Status Affected: None
Encoding:
Description:
Words:
Cycles:
Example:
DS30453D-page 52
Before Instruction
After Instruction
Before Instruction
After Instruction
FLAG_REG = 0x0A
FLAG_REG = 0x8A
PC
if FLAG<1> = 0,
PC
if FLAG<1> = 1,
PC
Bit Set f
[ label ] BSF
0
0
1
Bit ’b’ in register ’f’ is set.
1
1
BSF
Bit Test f, Skip if Clear
[ label ] BTFSC f,b
0
0
skip if (f<b>) = 0
If bit ’b’ in register ’f’ is 0 then the
next instruction is skipped.
If bit ’b’ is 0 then the next instruc-
tion fetched during the current
instruction execution is discarded,
and a NOP is executed instead,
making this a 2-cycle instruction.
1
1(2)
HERE
FALSE
TRUE
0101
0110
f
b
f
b
(f<b>)
= address (HERE)
= address (TRUE);
= address(FALSE)
31
31
7
7
FLAG_REG,
BTFSC
GOTO
•
•
•
bbbf
bbbf
f,b
FLAG,1
PROCESS_CODE
ffff
ffff
7
Preliminary
BTFSS
Syntax:
Operands:
Operation:
Status Affected: None
Encoding:
Description:
Words:
Cycles:
Example:
Before Instruction
After Instruction
PC
If FLAG<1>
PC
if FLAG<1>
PC
Bit Test f, Skip if Set
[ label ] BTFSS f,b
0
0
skip if (f<b>) = 1
If bit ’b’ in register ’f’ is ’1’ then the
next instruction is skipped.
If bit ’b’ is ’1’, then the next instruc-
tion fetched during the current
instruction execution, is discarded
and a NOP is executed instead,
making this a 2-cycle instruction.
1
1(2)
HERE
FALSE
TRUE
0111
f
b < 7
31
=
=
=
=
=
2002 Microchip Technology Inc.
GOTO
BTFSS
bbbf
address (HERE)
0,
address (FALSE);
1,
address (TRUE)
PROCESS_CODE
FLAG,1
ffff
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