PIC16C65A-04E/PQ Microchip Technology, PIC16C65A-04E/PQ Datasheet

IC MCU OTP 4KX14 PWM 44-MQFP

PIC16C65A-04E/PQ

Manufacturer Part Number
PIC16C65A-04E/PQ
Description
IC MCU OTP 4KX14 PWM 44-MQFP
Manufacturer
Microchip Technology
Series
PIC® 16Cr

Specifications of PIC16C65A-04E/PQ

Core Processor
PIC
Core Size
8-Bit
Speed
4MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
33
Program Memory Size
7KB (4K x 14)
Program Memory Type
OTP
Ram Size
192 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 6 V
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
44-MQFP, 44-PQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC16C65A-04E/PQ
Manufacturer:
Microchip Technology
Quantity:
10 000
The PIC16C65A (Rev. A) parts you have received con-
form
(DS30234D), except for the anomalies described
below.
All the problems listed here will be addressed in future
revisions of the PIC16C65A silicon.
1. Module: CCP (Compare Mode)
TABLE 1:
 2001 Microchip Technology Inc.
CCPxM<3:0> =
CCP Mode
The Compare mode may not operate as expected
when configuring the compare match to drive the
I/O pin low (CCPxM<3:0> = 1001).
When the CCP module is changed to compare
output low (CCPxM<3:0> = 1001) from any other
non-compare CCP mode, the I/O pin will immedi-
ately be driven low, regardless of the state of the
I/O data latch. The pin will remain low when the
compare match occurs (see Table 1).
However, when the CCP module is changed to
compare output high (CCPxM<3:0> = 1000) from
any other CCP mode, the I/O pin will immediately
be driven low, regardless of the state of the I/O
data latch. The pin will be driven high when the
compare match occurs.
functionally
0xxx
1000
1001
101x
11xx
COMPARE OUTPUT LOW
SWITCHING
PIC16C65A Rev. A Silicon Errata Sheet
to
I/O pin
State
H
H
H
H
H
L
L
L
L
L
the
Device
1001
Change CCP to
CCPxM<3:0> =
H
L
L
L
L
L
L
L
Data
1000
Sheet
L
L
L
L
L
L
L
L
2. Module: CCP (Compare Mode)
3. Module: SSP Module (I
Work around
To have the I/O pin high until the compare match
low occurs, force a compare match high to get the
I/O pin into the high state, then reconfigure the
compare match to force the I/O low, when the com-
pare condition occurs.
The special event trigger of the Compare mode
may not occur if both of the following conditions
exist:
CCP1
The interrupt for the compare event will still be
generated, but no special event trigger will occur.
Work around
Use the Interrupt Service Routine instead of using
the special event trigger to reset Timer1 (and start
an A/D conversion, if applicable).
If the bus is active when the I
and the next 8 bits of data on the bus match the
address of the device, then the SSP module will
generate an Acknowledge pulse.
Work around
Before enabling the I
is not active.
Unit
PIC16C65A
An instruction, one cycle (T
Timer1/Compare register match has literal
data equal to the address of a CCP register
being used. Specific cases include:
An instruction in the same cycle as a
Timer1/Compare register match has an
MSb of ‘0’.
CCP1CON
Register
CCPR1H
CCPR1L
2
C mode, ensure that the bus
2
C™ mode)
2
C mode is enabled,
CY
) prior to a
DS80096A-page 1
Literal Data
15h
16h
17h

Related parts for PIC16C65A-04E/PQ

PIC16C65A-04E/PQ Summary of contents

Page 1

... PIC16C65A Rev. A Silicon Errata Sheet The PIC16C65A (Rev. A) parts you have received con- form functionally to the Device (DS30234D), except for the anomalies described below. All the problems listed here will be addressed in future revisions of the PIC16C65A silicon. 1. Module: CCP (Compare Mode) The Compare mode may not operate as expected when configuring the compare match to drive the I/O pin low (CCPxM< ...

Page 2

... PIC16C65A 4. Module: SSP (SPI Mode) When the SPI is using Timer2/2 as the clock source, a shorter than expected SCK pulse may occur on the first bit of the transmitted/received data (Figure 1). FIGURE 1: SCK PULSE VARIATION USING TIMER2/2 Write SSPBUF bit0=1 bit1=0 bit2 SD0 SCK Work around ...

Page 3

... When the USART (SCI) is configured in Asynchro- nous mode with the BRGH bit set, a high number of receive errors may be experienced. For asyn- chronous receive operations recommended that the USART be configured with the BRGH bit cleared.  2001 Microchip Technology Inc. PIC16C65A DS80096A-page 3 ...

Page 4

... PIC16C65A Clarifications/Corrections to the Data Sheet: In the Device Data Sheet (DS30234D), the following clarifications and corrections should be noted. 1. Module: I/O Ports The specification for the High Voltage Open Drain I/O (parameter D150, the RA4 pin) cannot be met without possible long term reliability issues on that I/O pin ...

Page 5

... Write to TMR1H and/or TMR1L Register(s) TMR1H:TMR1L Increments  2001 Microchip Technology Inc. PIC16C65A When the TMR1H and/or TMR1L registers are written while this clock is low, TMR1 will not incre- ment on the next rising edge of this clock, but must first have a falling clock and the rising clock for TMR1 to increment ...

Page 6

... PIC16C65A 4. Module: RC Oscillator The table for RC Oscillator Frequencies in the Device Characterization section of the Data Sheet is incorrect. The correct characterization informa- tion is shown in Table 3. TABLE 3: RC OSCILLATOR FREQUENCIES CHARACTERIZATION CHANGES FROM DATA SHEET C R EXT EXT 100 K 100 pF 3 100 K 330 pF 3 ...

Page 7

... L , SEEVAL, MPLAB and The EE OQ Embedded Control Solutions Company are registered trade- marks of Microchip Technology Incorporated in the U.S.A. and other countries. Total Endurance, ICSP, In-Circuit Serial Programming, Filter- Lab, MXDEV, microID, FlexROM, fuzzyLAB, MPASM, MPLINK, MPLIB, PICDEM, ICEPIC, Migratable Memory, FanSense, ECONOMONITOR, SelectMode and microPort are trademarks of Microchip Technology Incorporated in the U ...

Page 8

... Microchip. No licenses are conveyed, implicitly or otherwise, except as maybe explicitly expressed herein, under any intellec- tual property rights. The Microchip logo and name are registered trademarks of Microchip Technology Inc. in the U.S.A. and other countries. All rights reserved. All other trademarks mentioned herein are the property of their respective companies. ...

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