PIC16C65B-20E/PQ Microchip Technology, PIC16C65B-20E/PQ Datasheet - Page 21
![IC MCU OTP 4KX14 PWM 44-MQFP](/photos/6/59/65984/150-44-pqfp_sml.jpg)
PIC16C65B-20E/PQ
Manufacturer Part Number
PIC16C65B-20E/PQ
Description
IC MCU OTP 4KX14 PWM 44-MQFP
Manufacturer
Microchip Technology
Series
PIC® 16Cr
Datasheets
1.PIC16F818-ISO.pdf
(6 pages)
2.PIC16C63A-04SP.pdf
(184 pages)
3.PIC16C63A-04SP.pdf
(10 pages)
4.PIC16C63A-04SP.pdf
(10 pages)
5.PIC16C65B-04P.pdf
(7 pages)
Specifications of PIC16C65B-20E/PQ
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
33
Program Memory Size
7KB (4K x 14)
Program Memory Type
OTP
Ram Size
192 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
44-MQFP, 44-PQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC16C65B-20E/PQ
Manufacturer:
Microchip Technology
Quantity:
10 000
- PIC16F818-ISO PDF datasheet
- PIC16C63A-04SP PDF datasheet #2
- PIC16C63A-04SP PDF datasheet #3
- PIC16C63A-04SP PDF datasheet #4
- PIC16C65B-04P PDF datasheet #5
- Current page: 21 of 184
- Download datasheet (3Mb)
4.2.2.3
The INTCON register is a readable and writable regis-
ter, which contains various enable and flag bits for the
TMR0 register overflow, RB Port change and external
RB0/INT pin interrupts.
REGISTER 4-3:
2000 Microchip Technology Inc.
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
INTCON Register
INTCON REGISTER (ADDRESS 0Bh, 8Bh)
bit 7
GIE: Global Interrupt Enable bit
1 = Enables all unmasked interrupts
0 = Disables all interrupts
PEIE: Peripheral Interrupt Enable bit
1 = Enables all unmasked peripheral interrupts
0 = Disables all peripheral interrupts
T0IE: TMR0 Overflow Interrupt Enable bit
1 = Enables the TMR0 interrupt
0 = Disables the TMR0 interrupt
INTE: RB0/INT External Interrupt Enable bit
1 = Enables the RB0/INT external interrupt
0 = Disables the RB0/INT external interrupt
RBIE: RB Port Change Interrupt Enable bit
1 = Enables the RB port change interrupt
0 = Disables the RB port change interrupt
T0IF: TMR0 Overflow Interrupt Flag bit
1 = TMR0 register has overflowed (must be cleared in software)
0 = TMR0 register did not overflow
INTF: RB0/INT External Interrupt Flag bit
1 = The RB0/INT external interrupt occurred (must be cleared in software)
0 = The RB0/INT external interrupt did not occur
RBIF: RB Port Change Interrupt Flag bit
1 = At least one of the RB7:RB4 pins changed state
0 = None of the RB7:RB4 pins have changed state
Note 1: A mismatch condition will exist until PORTB is read. After reading PORTB, the RBIF
Legend:
R = Readable bit
-n = Value at POR
R/W-0
GIE
flag bit can be cleared.
R/W-0
PEIE
R/W-0
T0IE
W = Writable bit
’1’ = Bit is set
PIC16C63A/65B/73B/74B
R/W-0
INTE
Note:
U = Unimplemented bit, read as ‘0’
’0’ = Bit is cleared
Interrupt flag bits are set when an interrupt
condition occurs, regardless of the state of
its corresponding enable bit, or the global
enable bit, GIE (INTCON<7>). User soft-
ware should ensure the appropriate inter-
rupt flag bits are clear prior to enabling an
interrupt
R/W-0
RBIE
(1)
.
R/W-0
T0IF
x = Bit is unknown
R/W-0
INTF
DS30605C-page 21
R/W-x
RBIF
bit 0
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