PIC16C72-10E/SS Microchip Technology, PIC16C72-10E/SS Datasheet - Page 17
![IC MCU OTP 2KX14 A/D PWM 28SSOP](/photos/6/81/68119/150-28-ssop_sml.jpg)
PIC16C72-10E/SS
Manufacturer Part Number
PIC16C72-10E/SS
Description
IC MCU OTP 2KX14 A/D PWM 28SSOP
Manufacturer
Microchip Technology
Series
PIC® 16Cr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16F818-ISO.pdf
(6 pages)
3.PIC16C72-04SO.pdf
(289 pages)
4.PIC16C72-04SO.pdf
(125 pages)
5.PIC16C72-04SO.pdf
(8 pages)
Specifications of PIC16C72-10E/SS
Core Processor
PIC
Core Size
8-Bit
Speed
10MHz
Connectivity
I²C, SPI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Program Memory Size
3.5KB (2K x 14)
Program Memory Type
OTP
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 6 V
Data Converters
A/D 5x8b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
28-SSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
2.5
The INDF register is not a physical register. Address-
ing INDF actually addresses the register whose
address is contained in the FSR register (FSR is a
pointer ). This is indirect addressing.
EXAMPLE 2-1:
• Register file 05 contains the value 10h
• Register file 06 contains the value 0Ah
• Load the value 05 into the FSR register
• A read of the INDF register will return the value of
• Increment the value of the FSR register by one
• A read of the INDR register now will return the
Reading INDF itself indirectly (FSR = 0) will produce
00h. Writing to the INDF register indirectly results in a
no-operation (although STATUS bits may be affected).
FIGURE 2-11: DIRECT/INDIRECT ADDRESSING
1998 Microchip Technology Inc.
10h
(FSR = 06)
value of 0Ah.
bank select
RP1:RP0
(2)
Note 1: For register file map detail see Figure 2-2.
Indirect Addressing, INDF and FSR
Registers
2: Maintain RP1 and IRP as clear for upward compatibility with future products.
3: Not implemented.
location select
6
Direct Addressing
Data
Memory(1)
INDIRECT ADDRESSING
from opcode
00h
7Fh
Bank 0
00
0
80h
FFh
Bank 1
01
Preliminary
100h
17Fh
Bank 2
10
(3)
not used
A simple program to clear RAM locations 20h-2Fh
using indirect addressing is shown in Example 2-2.
EXAMPLE 2-2:
NEXT
CONTINUE
An effective 9-bit address is obtained by concatenating
the 8-bit FSR register and the IRP bit (STATUS<7>), as
shown in Figure 2-11. However, IRP is not used in the
PIC16C72 Series.
180h
1FFh
Bank 3
11
(3)
PIC16C72 Series
IRP
movlw
movwf
clrf
incf
btfss
goto
:
(2)
bank select
HOW TO CLEAR RAM
USING INDIRECT
ADDRESSING
0x20
FSR
INDF
FSR
FSR,4 ;all done?
NEXT
7
Indirect Addressing
;initialize pointer
;
;clear INDF register
;inc pointer
;NO, clear next
;YES, continue
FSR register
to RAM
DS39016A-page 17
location select
0