PIC16C923-08/SP Microchip Technology, PIC16C923-08/SP Datasheet - Page 48
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PIC16C923-08/SP
Manufacturer Part Number
PIC16C923-08/SP
Description
IC MCU 64 LD 8MHZ 4K OTP 64-SDIP
Manufacturer
Microchip Technology
Series
PIC® 16Cr
Datasheets
1.PIC16F818-ISO.pdf
(6 pages)
2.PIC16C923-04L.pdf
(189 pages)
3.PIC16C923-04L.pdf
(10 pages)
Specifications of PIC16C923-08/SP
Core Processor
PIC
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C, SPI
Peripherals
LCD, POR, PWM, WDT
Number Of I /o
25
Program Memory Size
7KB (4K x 14)
Program Memory Type
OTP
Ram Size
176 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 6 V
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
64-SDIP (0.750", 19.05mm)
For Use With
AC164025 - MODULE SKT PROMATEII 64DIPDVA16XP640 - ADAPTER DEVICE FOR MPLAB-ICE
Lead Free Status / RoHS Status
Request inventory verification / Request inventory verification
Eeprom Size
-
Data Converters
-
- Current page: 48 of 189
- Download datasheet (2Mb)
PIC16C9XX
7.3
An 8-bit counter is available as a prescaler for the
Timer0 module, or as a postscaler for the Watchdog
Timer (Figure 7-6). For simplicity, this counter is being
referred to as “prescaler” throughout this data sheet.
Note that the prescaler may be used by either the
Timer0 module or the WDT but not both. Thus, a pres-
caler assignment for the Timer0 module means that
there is no prescaler for the Watchdog Timer, and
vice-versa.
The PSA and PS2:PS0 bits (OPTION<3:0>) determine
the prescaler assignment and prescale ratio.
FIGURE 7-6: BLOCK DIAGRAM OF THE TIMER0/WDT PRESCALER
DS30444E - page 48
RA4/T0CKI
CLKOUT (=Fosc/4)
WDT Enable bit
pin
Watchdog
Timer
Prescaler
Note: T0CS, T0SE, PSA, PS2:PS0 are (OPTION<5:0>).
T0SE
0
1
PSA
M
U
X
0
1
T0CS
M
U
X
0
8-bit Prescaler
8 - to - 1MUX
Time-out
8
M U X
WDT
1
0
1
PSA
M
U
X
When assigned to the Timer0 module, all instructions
writing to the TMR0 register (e.g. CLRF 1, MOVWF 1,
BSF 1,x....etc.) will clear the prescaler count. When
assigned to WDT, a CLRWDT instruction will clear the
prescaler count along with the Watchdog Timer. The
prescaler is not readable or writable.
Note:
PSA
PS2:PS0
Cycles
SYNC
Writing to TMR0 when the prescaler is
assigned to Timer0 will clear the prescaler
count, but will not change the prescaler
assignment.
2
1997 Microchip Technology Inc.
TMR0 reg
Data Bus
8
Set flag bit T0IF
on Overflow
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