PIC16LC72-04I/SS Microchip Technology, PIC16LC72-04I/SS Datasheet
PIC16LC72-04I/SS
Specifications of PIC16LC72-04I/SS
Related parts for PIC16LC72-04I/SS
PIC16LC72-04I/SS Summary of contents
Page 1
... High Sink/Source Current 25/25 mA • Commercial, Industrial and Extended temperature ranges • Low-power consumption: - < 5V, 4 MHz - 15 A typical @ 3V, 32 kHz - < typical standby current 1998 Microchip Technology Inc. PIC16C72 SERIES Pin Diagrams SDIP, SOIC, SSOP, Windowed Side Brazed Ceramic MCLR/V PP RA0/AN0 ...
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... Instruction Set (No. of Instructions) DS39016A-page 2 PIC16C72 DC - 20MHz POR, PWRT, OST, BOR 2K (EPROM) 128 8 PortA, PortB, PortC Timer0, Timer1, Timer2 1 Basic SSP 5 channels 35 Preliminary 1998 Microchip Technology Inc. PIC16CR72 DC - 20MHz POR, PWRT, OST, BOR 2K (ROM) 128 8 PortA, PortB, PortC Timer0, Timer1, Timer2 1 SSP 5 channels 35 ...
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... Synchronous A/D Serial Port Note 1: Higher order bits are from the STATUS register. 1998 Microchip Technology Inc. PIC16C72 Series The program memory contains 2K words which trans- late to 2048 instructions, since each 14-bit program memory word is the same width as each device instruc- tion. The data memory (RAM) contains 128 bytes. There are also 22 I/O pins that are user-confi ...
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... I mode). ST RC5 can also be the SPI Data Out (SPI mode — Ground reference for logic and I/O pins. — Positive supply for logic and I/O pins. I/O = input/output P = power TTL = TTL input ST = Schmitt Trigger input Preliminary . 1998 Microchip Technology Inc. ...
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... The address range for this program memory is 0000h - 07FFh. Accessing a location above the physically implemented address will cause a wrap- around. The reset vector is at 0000h and the interrupt vector is at 0004h. 1998 Microchip Technology Inc. PIC16C72 Series FIGURE 2-1: PROGRAM MEMORY MAP AND STACK PC<12:0> ...
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... T2CON PR2 SSPBUF SSPADD 93h SSPCON SSPSTAT 94h CCPR1L 95h 96h CCPR1H 97h 98h 99h 9Ah 9Bh 9Ch 9Dh 9Eh ADRES ADCON0 ADCON1 9Fh A0h General General Purpose Purpose Register Register BFh C0h FFh Bank 0 Bank 1 1998 Microchip Technology Inc. ...
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... Other (non power-up) resets include external reset through MCLR and Watchdog Timer Reset. 4: The IRP and RP1 bits are reserved on the PIC16C72/CR72. Always maintain these bits clear. 5: SSPSTAT<7:6> are not implemented on the PIC16C72, read as '0'. 1998 Microchip Technology Inc. PIC16C72 Series The special function registers can be classified into two sets (core and peripheral). Those registers associated with the “ ...
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... UA BF 0000 0000 0000 0000 — — — — — — — — — — — — — — — — — — — — PCFG1 PCFG0 ---- -000 ---- -000 1998 Microchip Technology Inc. ...
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... Note: For borrow the polarity is reversed. A subtraction is executed by adding the two’s complement of the second operand. For rotate (RRF, RLF) instructions, this bit is loaded with either the high or low order bit of the source register. 1998 Microchip Technology Inc. PIC16C72 Series It is recommended, therefore, that only BCF, BSF, ...
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... To achieve a 1:1 prescaler assignment for the TMR0 register, assign the prescaler to the Watchdog Timer. R/W-1 R/W-1 R/W-1 R/W-1 PSA PS2 PS1 PS0 128 Preliminary R = Readable bit W = Writable bit bit0 U = Unimplemented bit, read as ‘0’ Value at POR reset 1998 Microchip Technology Inc. ...
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... RBIF: RB Port Change Interrupt Flag bit least one of the RB7:RB4 pins changed state (must be cleared in software None of the RB7:RB4 pins have changed state 1998 Microchip Technology Inc. PIC16C72 Series Note: Interrupt flag bits get set when an interrupt condition occurs regardless of the state of its corresponding enable bit or the global enable bit, GIE (INTCON< ...
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... Disables the TMR1 overflow interrupt DS39016A-page 12 Note: Bit PEIE (INTCON<6>) must be set to enable any peripheral interrupt. R/W-0 R/W-0 R/W-0 R/W-0 SSPIE CCP1IE TMR2IE TMR1IE bit0 Preliminary R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ Value at POR reset 1998 Microchip Technology Inc. ...
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... No TMR2 to PR2 match occurred bit 0: TMR1IF: TMR1 Overflow Interrupt Flag bit 1 = TMR1 register overflowed (must be cleared in software TMR1 register did not overflow 1998 Microchip Technology Inc. PIC16C72 Series Note: Interrupt flag bits get set when an interrupt condition occurs regardless of the state of its corresponding enable bit or the global enable bit, GIE (INTCON< ...
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... BODEN bit in the Configuration word). U-0 U-0 R/W-0 R/W-q — — POR BOR bit0 Preliminary R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ Value at POR reset 1998 Microchip Technology Inc. ...
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... PC PCLATH Note: PCLATH is not updated with the contents of PCH. 1998 Microchip Technology Inc. PIC16C72 Series Figure 2-9 shows the four situations for the loading of the PC. Example 1 shows how the PC is loaded on a write to PCL (PCLATH<4:0> shows how the PC is loaded during a GOTO instruction (PCLATH< ...
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... POPs the address from the stack). Note: PIC16C72 Series devices ignore paging bit PCLATH<4>. The use of PCLATH<4> general purpose read/write bit is not recommended since this may affect upward compatibility with future products. Preliminary 1998 Microchip Technology Inc. manipulation of the ...
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... Bank 0 Note 1: For register file map detail see Figure 2-2. 2: Maintain RP1 and IRP as clear for upward compatibility with future products. 3: Not implemented. 1998 Microchip Technology Inc. PIC16C72 Series A simple program to clear RAM locations 20h-2Fh using indirect addressing is shown in Example 2-2. ...
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... PIC16C72 Series NOTES: DS39016A-page 18 Preliminary 1998 Microchip Technology Inc. ...
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... STATUS, RP0 ; Select Bank 1 MOVLW 0xCF ; Value used to ; initialize data ; direction MOVWF TRISA ; Set RA<3:0> as inputs ; RA<5:4> as outputs ; TRISA<7:6> are always ; read as '0'. 1998 Microchip Technology Inc. PIC16C72 Series FIGURE 3-1: BLOCK DIAGRAM OF RA3:RA0 AND RA5 PINS Data bus Port CK Q Data Latch ...
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... Legend unknown unchanged unimplemented locations read as '0'. Shaded cells are not used by PORTA. DS39016A-page 20 REF Bit 4 Bit 3 Bit 2 Bit 1 RA4 RA3 RA2 RA1 — — — PCFG2 PCFG1 Preliminary Value on: Value on all Bit 0 POR, other resets BOR RA0 --0x 0000 --0u 0000 --11 1111 --11 1111 PCFG0 ---- -000 ---- -000 1998 Microchip Technology Inc. ...
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... enable weak pull-ups, set the appropriate TRIS bit(s) and clear the RBPU bit (OPTION<7>). 1998 Microchip Technology Inc. PIC16C72 Series Four of PORTB’s pins, RB7:RB4, have an interrupt on change feature. Only pins configured as inputs can cause this interrupt to occur (i.e. any RB7:RB4 pin con- fi ...
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... Bit 4 Bit 3 Bit 2 Bit 1 RB5 RB4 RB3 RB2 RB1 T0CS T0SE PSA PS2 PS1 Preliminary Value on: Value on all Bit 0 POR, other resets BOR RB0 xxxx xxxx uuuu uuuu 1111 1111 1111 1111 PS0 1111 1111 1111 1111 1998 Microchip Technology Inc. ...
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... STATUS, RP0 ; Select Bank 1 MOVLW 0xCF ; Value used to ; initialize data ; direction MOVWF TRISC ; Set RC<3:0> as inputs ; RC<5:4> as outputs ; RC<7:6> as inputs 1998 Microchip Technology Inc. PIC16C72 Series FIGURE 3-5: PORTC BLOCK DIAGRAM (PERIPHERAL OUTPUT OVERRIDE) (2) PORT/PERIPHERAL Select Peripheral Data Out 0 Data bus D ...
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... Input/output port pin or Synchronous Serial Port data output Input/output port pin Input/output port pin Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 RC5 RC4 RC3 RC2 RC1 Preliminary mode). Value on: Value on all Bit 0 POR, other resets BOR RC0 xxxx xxxx uuuu uuuu 1111 1111 1111 1111 1998 Microchip Technology Inc. ...
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... T0SE T0CS Note 1: T0CS, T0SE, PSA, PS2:PS0 (OPTION_REG<5:0>). 2: The prescaler is shared with Watchdog Timer (refer to Figure 4-2 for detailed block diagram). 1998 Microchip Technology Inc. PIC16C72 Series Additional information on external clock requirements is available in the PICmicro™ Mid-Range MCU Refer- ence Manual, DS33023. ...
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... PORTA Data Direction Register Preliminary Data Bus 8 TMR0 reg Set flag bit T0IF on Overflow Value on: Value on all Bit 0 POR, other resets BOR xxxx xxxx uuuu uuuu RBIF 0000 000x 0000 000u PS0 1111 1111 1111 1111 --11 1111 --11 1111 1998 Microchip Technology Inc. ...
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... External clock from pin RC0/T1OSO/T1CKI (on the rising edge Internal clock (F /4) OSC bit 0: TMR1ON: Timer1 On bit 1 = Enables Timer1 0 = Stops Timer1 1998 Microchip Technology Inc. PIC16C72 Series 5.1 Timer1 Operation Timer1 can operate in one of these modes: • timer • synchronous counter • asynchronous counter The operating mode is determined by the clock select bit, TMR1CS (T1CON< ...
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... Note 1: When the T1OSCEN bit is cleared, the inverter and feedback resistor are turned off. This eliminates power drain. DS39016A-page 28 0 TMR1L 1 TMR1ON T1SYNC on/off 1 Prescaler T1OSCEN F /4 OSC Enable Internal 0 (1) Oscillator Clock 2 T1CKPS1:T1CKPS0 TMR1CS Preliminary Synchronized clock input Synchronize det SLEEP input 1998 Microchip Technology Inc. ...
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... Legend unknown unchanged unimplemented read as '0'. Shaded cells are not used by the Timer1 module. Note 1: These bits are unimplemented, read as '0'. 1998 Microchip Technology Inc. PIC16C72 Series 5.3 Timer1 Interrupt The TMR1 Register pair (TMR1H:TMR1L) increments from 0000h to FFFFh and rolls over to 0000h. The TMR1 Interrupt, if enabled, is generated on overfl ...
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... PIC16C72 Series NOTES: DS39016A-page 30 Preliminary 1998 Microchip Technology Inc. ...
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... T2CON register • any device reset (Power-on Reset, MCLR reset, Watchdog Timer reset, or Brown-out Reset) TMR2 is not cleared when T2CON is written. 1998 Microchip Technology Inc. PIC16C72 Series 6.2 Timer2 Interrupt The Timer2 module has an 8-bit period register PR2. ...
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... Value at POR reset Value on: Value on Bit 0 POR, all other BOR resets 0000 000x 0000 000u RBIF 0000 0000 0000 0000 TMR1IF 0000 0000 0000 0000 TMR1IE 0000 0000 0000 0000 1111 1111 1111 1111 1998 Microchip Technology Inc. ...
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... Compare mode, trigger special event (CCP1IF bit is set; CCP1 resets TMR1 and starts an A/D conversion (if A/D module is enabled)) 11xx = PWM mode 1998 Microchip Technology Inc. PIC16C72 Series Additional information on the CCP module is available in the PICmicro™ Mid-Range MCU Reference Manual, DS33023 ...
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... EXAMPLE 7-1: CLRF CCP1CON MOVLW NEW_CAPT_PS MOVWF CCP1CON CCPR1L TMR1L Preliminary CHANGING BETWEEN CAPTURE PRESCALERS ;Turn CCP module off ;Load the W reg with ; the new prescaler ; mode value and CCP ON ;Load CCP1CON with this ; value 1998 Microchip Technology Inc. ...
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... Legend unknown unchanged unimplemented read as '0'. Shaded cells are not used by Capture and Timer1. Note 1: These bits/registers are unimplemented, read as '0'. 1998 Microchip Technology Inc. PIC16C72 Series 7.2.1 CCP PIN CONFIGURATION The user must configure the RC2/CCP1 pin as an out- put by clearing the TRISC< ...
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... Maximum PWM resolution (bits) for a given PWM frequency: = Note: If the PWM duty cycle value is longer than the PWM period the CCP1 pin will not be cleared. Preliminary ¥ OSC (TMR2 prescale value) Tosc ¥ (TMR2 prescale value OSC log F PWM bits log(2) 1998 Microchip Technology Inc. ...
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... CCP1CON — — Legend unknown unchanged unimplemented read as '0'. Shaded cells are not used by PWM and Timer2. Note 1: These bits/registers are unimplemented, read as '0'. 1998 Microchip Technology Inc. PIC16C72 Series 3. Make the CCP1 pin an output by clearing the TRISC<2> bit. 4. Set the TMR2 prescale value and enable Timer2 by writing to T2CON ...
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... PIC16C72 Series NOTES: DS39016A-page 38 Preliminary 1998 Microchip Technology Inc. ...
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... SPI Mode for PIC16CR72 ............................... 43 2 8.4 SSP I C Operation .......................................... 47 2 For Overview, refer to the PICmicro™ Mid- Range MCU Reference Manual (DS33023). Also, refer to Application Note AN578, “Use of the SSP Module in 2 the I C Multi-Master Environment.” 1998 Microchip Technology Inc. PIC16C72 Series Preliminary DS39016A-page 39 ...
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... Additional information on SPI operation may be found in the PICmicro™ Mid-Range MCU Reference Manual, DS33023. R-0 R-0 R-0 R mode only mode only) Preliminary R = Readable bit W = Writable bit bit0 U = Unimplemented bit, read as ‘0’ =Value at POR reset 1998 Microchip Technology Inc. ...
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... C firmware controlled master operation (slave idle) 2 1110 = I C slave mode, 7-bit address with start and stop bit interrupts enabled 2 1111 = I C slave mode, 10-bit address with start and stop bit interrupts enabled 1998 Microchip Technology Inc. PIC16C72 Series R/W-0 R/W-0 R/W-0 R/W-0 SSPM3 ...
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... Edge Select T Prescaler CY 4, 16, 64 TRISC<3> Value on: Value on Bit 0 POR, all other BOR resets RBIF 0000 000x 0000 000u 1111 1111 1111 1111 xxxx xxxx uuuu uuuu SSPM0 0000 0000 0000 0000 --11 1111 --11 1111 BF --00 0000 --00 0000 1998 Microchip Technology Inc. ...
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... Receive complete, SSPBUF is full 0 = Receive not complete, SSPBUF is empty 2 Transmit (I C mode only Transmit in progress, SSPBUF is full 0 = Transmit complete, SSPBUF is empty 1998 Microchip Technology Inc. PIC16C72 Series Additional information on SPI operation may be found in the PICmicro™ Mid-Range MCU Reference Manual, DS33023. R-0 R-0 ...
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... C slave mode, 10-bit address with start and stop bit interrupts enabled DS39016A-page 44 R/W-0 R/W-0 R/W-0 R/W-0 SSPM3 SSPM2 SSPM1 SSPM0 bit0 /4 OSC /16 OSC /64 OSC Preliminary R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ =Value at POR reset 1998 Microchip Technology Inc. ...
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... SPI module will reset if the SS pin is set Note: If the SPI is used in Slave Mode with CKE = '1', then the SS pin control must be enabled. 1998 Microchip Technology Inc. PIC16C72 Series FIGURE 8-6: SSP BLOCK DIAGRAM (SPI MODE)(PIC16CR72) Read SSPBUF reg SSPSR reg ...
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... PORTA Data Direction Register D R/W UA Preliminary Value on: Value on Bit 0 POR, all other BOR resets RBIF 0000 000x 0000 000u 1111 1111 1111 1111 xxxx xxxx uuuu uuuu SSPM0 0000 0000 0000 0000 --11 1111 --11 1111 BF 0000 0000 0000 0000 1998 Microchip Technology Inc. ...
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... Serial Receive/Transmit Buffer (SSPBUF) • SSP Shift Register (SSPSR) - Not directly acces- sible • SSP Address Register (SSPADD) 1998 Microchip Technology Inc. PIC16C72 Series The SSPCON register allows control of the I tion. Four mode selection bits (SSPCON<3:0>) allow one of the following I 2 • ...
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... Receive first (high) byte of Address (bits SSPIF and BF are set). 9. Read the SSPBUF register (clears bit BF) and clear flag bit SSPIF. Generate ACK SSPBUF Pulse Yes Yes Preliminary Set bit SSPIF (SSP Interrupt occurs if enabled) Yes Yes Yes Yes 1998 Microchip Technology Inc. ...
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... SCL S SSPIF (PIR1<3>) BF (SSPSTAT<0>) SSPOV (SSPCON<6>) 1998 Microchip Technology Inc. PIC16C72 Series When the address byte overflow condition exists, then no acknowledge (ACK) pulse is given. An overflow con- dition is defined as either bit BF (SSPSTAT<0>) is set or bit SSPOV (SSPCON<6>) is set. An SSP interrupt is generated for each data transfer byte. Flag bit SSPIF (PIR1< ...
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... SCL held low while CPU responds to SSPIF cleared in software SSPBUF is written in software Set bit after writing to SSPBUF (the SSPBUF must be written-to before the CKP bit can be set) Preliminary Transmitting Data ACK From SSP interrupt service routine 1998 Microchip Technology Inc. ...
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... Shaded cells are not used by SSP module in SPI mode. Note 1: These bits are unimplemented, read as '0'. 2: The SMP and CKE bits are implemented on the PIC16CR72 only. On the PIC16C72, these two bits are unimplemented, read as '0'. 1998 Microchip Technology Inc. PIC16C72 Series 8.4.3 MULTI-MASTER OPERATION ...
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... PIC16C72 Series NOTES: DS39016A-page 52 Preliminary 1998 Microchip Technology Inc. ...
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... Unimplemented: Read as '0' bit 0: ADON: A/D On bit 1 = A/D converter module is operating 0 = A/D converter module is shutoff and consumes no operating current 1998 Microchip Technology Inc. PIC16C72 Series Additional information on the A/D module is available in the PICmicro™ Mid-Range MCU Reference Manual, DS33023. The A/D module has three registers. These registers are: • ...
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... D = Digital I/O DS39016A-page 54 U-0 R/W-0 R/W-0 R/W-0 — PCFG2 PCFG1 PCFG0 RA1 RA2 RA5 RA3 V REF RA3 REF RA3 REF RA3 REF GND Preliminary R = Readable bit W = Writable bit bit0 U = Unimplemented bit, read as ‘0’ Value at POR reset 1998 Microchip Technology Inc. ...
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... Turn on A/D module (ADCON0) FIGURE 9-3: A/D BLOCK DIAGRAM A/D Converter V REF (Reference voltage) 1998 Microchip Technology Inc. PIC16C72 Series 2. Configure A/D interrupt (if desired): • Clear ADIF bit • Set ADIE bit • Set GIE bit 3. Wait the required acquisition time. ...
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... LSb error (512 steps for the A/D). The 1/2 LSb error is the maximum error allowed for the A/D to meet its specified accuracy The Sampling Switch leakage V = 0.6V T 500 Sampling Switch Preliminary , see ACQ C HOLD = DAC capacitance = 51 1998 Microchip Technology Inc. ...
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... For faster conversion times, the selection of another clock source is recommended. 4: When device frequency is greater than 1 MHz, the RC A/D conversion clock source is recommended for sleep operation only. 5: For extended voltage devices (LC), please refer to Electrical Specifications section. 1998 Microchip Technology Inc. PIC16C72 Series 9.3 Configuring Analog Port Pins ...
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... PORTA Data Direction Register Preliminary Value on: Value on all Bit 0 POR, other Resets BOR RBIF 0000 000x 0000 000u -0-- 0000 -0-- 0000 xxxx xxxx uuuu uuuu ADON 0000 00-0 0000 00-0 PCFG0 ---- -000 ---- -000 --0x 0000 --0u 0000 RA0 --11 1111 --11 1111 1998 Microchip Technology Inc. ...
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... Enabling Brown-out Reset automatically enables Power-up Timer (PWRT) regardless of the value of bit PWRTE. Ensure the Power-up Timer is enabled anytime Brown-out Reset is enabled. 2: All of the CP1:CP0 pairs have to be given the same value to enable the code protection scheme listed. 1998 Microchip Technology Inc. PIC16C72 Series ble. The other is the Power-up Timer (PWRT), which provides a fi ...
Page 60
... MHz MHz MHz MHz 15-33 pF 15- MHz 15-33 pF 15-33 pF Crystals Used Epson C-001R32.768K-A 20 PPM STD XTL 200.000KHz 20 PPM ECS ECS-10-13-1 50 PPM ECS ECS-40-20-1 50 PPM EPSON CA-301 8.000M-C 30 PPM EPSON CA-301 20.000M-C 30 PPM 1998 Microchip Technology Inc. ...
Page 61
... Cext V SS OSC2/CLKOUT Fosc/4 Recommended values Rext 100 k Cext > 20pF 1998 Microchip Technology Inc. PIC16C72 Series 10.3 Reset The PIC16CXXX family differentiates between various kinds of reset: • Power-on Reset (POR) • MCLR reset during normal operation • MCLR reset during SLEEP • ...
Page 62
... Power-on Reset V DD Brown-out Reset BODEN OST/PWRT OST 10-bit Ripple counter OSC1 (1) PWRT On-chip 10-bit Ripple counter RC OSC Note 1: This is a separate oscillator from the RC oscillator of the CLKIN pin. DS39016A-page 62 Enable PWRT Enable OST Preliminary 1998 Microchip Technology Inc. S Chip_Reset R Q ...
Page 63
... MCLR from external capacitor C in the event of MCLR/V PP down due to Electrostatic Discharge (ESD) or Electrical Overstress (EOS). 1998 Microchip Technology Inc. PIC16C72 Series 10.5 Power-up Timer (PWRT) The Power-up Timer provides a fixed 72 ms nominal time-out on power-up only, from the POR. The Power- up Timer operates on an internal RC oscillator ...
Page 64
... Program STATUS Counter Register 000h 0001 1xxx 000h 000u uuuu 000h 0001 0uuu 000h 0000 1uuu uuu0 0uuu 000h 0001 1uuu ( uuu1 0uuu Preliminary Wake-up from SLEEP 1024T OSC OSC — PCON Register ---- --0x ---- --uu ---- --uu ---- --uu ---- --uu ---- --u0 ---- --uu 1998 Microchip Technology Inc. ...
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... Note 1: One or more bits in INTCON, PIR1 and/or PIR2 will be affected (to cause wake-up). 2: When the wake-up is due to an interrupt and the GIE bit is set, the PC is loaded with the interrupt vector (0004h). 3: See Table 10-5 for reset value for specific condition. 1998 Microchip Technology Inc. PIC16C72 Series MCLR Resets WDT Reset ...
Page 66
... MCLR INTERNAL POR PWRT TIME-OUT OST TIME-OUT INTERNAL RESET FIGURE 10-9: TIME-OUT SEQUENCE ON POWER-UP (MCLR NOT TIED MCLR INTERNAL POR PWRT TIME-OUT OST TIME-OUT INTERNAL RESET DS39016A-page PWRT T OST T PWRT T OST T PWRT T OST Preliminary 1998 Microchip Technology Inc. ): CASE CASE 2 DD ...
Page 67
... FIGURE 10-10: SLOW RISE TIME (MCLR TIED MCLR INTERNAL POR PWRT TIME-OUT OST TIME-OUT INTERNAL RESET 1998 Microchip Technology Inc. PIC16C72 Series ) PWRT T OST Preliminary DS39016A-page 67 ...
Page 68
... An input change on PORTB<7:4> sets flag bit RBIF (INTCON<0>). The interrupt can be enabled/disabled by setting/clearing enable bit RBIE (INTCON<4>). (Section 3.2) T0IF Wake-up (If in SLEEP mode) T0IE INTF INTE RBIF RBIE PEIE GIE Preliminary 1998 Microchip Technology Inc. pin, flag bit INTF Interrupt to CPU Clear GIE bit ...
Page 69
... Service Routine (ISR) - user defined : SWAPF STATUS_TEMP,W MOVWF STATUS SWAPF W_TEMP,F SWAPF W_TEMP,W 1998 Microchip Technology Inc. PIC16C72 Series The example: a) Stores the W register. b) Stores the STATUS register in bank 0. c) Executes the ISR code. d) Restores the STATUS register (and bank select bit) ...
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... Postscaler MUX PSA 0 1 MUX WDT Time-out Bit 6 Bit 5 Bit 4 Bit 3 (1) CP1 CP0 BODEN PWRTE INTEDG T0CS T0SE PSA Preliminary PS2:PS0 To TMR0 (Figure 4-2) PSA Bit 2 Bit 1 Bit 0 (1) WDTE FOSC1 FOSC0 PS2 PS1 PS0 1998 Microchip Technology Inc. ...
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... A/D conversion (when A/D clock source is RC). 6. Special event trigger (Timer1 in asynchronous mode using an external clock). 1998 Microchip Technology Inc. PIC16C72 Series Other peripherals cannot generate interrupts since dur- ing SLEEP, no on-chip clocks are present. When the SLEEP instruction is being executed, the next instruction ( pre-fetched ...
Page 72
... For complete details of serial programming, please refer to the In-Circuit Serial Programming (ICSP™) Guide, DS30277. DS39016A-page (2) OST Interrupt Latency (Note 2) Processor in SLEEP PC+2 PC Inst( Dummy cycle Inst( Preliminary 0004h 0005h Inst(0004h) Inst(0005h) Dummy cycle Inst(0004h) 1998 Microchip Technology Inc. ...
Page 73
... MHz, the normal instruction execution time conditional test is true or the program counter is changed as a result of an instruc- tion, the instruction execution time 1998 Microchip Technology Inc. PIC16C72 Series Table 11-2 lists the instructions recognized by the MPASM assembler. Figure 11-1 shows the general formats that the instruc- tions can have ...
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... TO PD 0000 0110 0100 , 1kkk kkkk kkkk Z 1000 kkkk kkkk 00xx kkkk kkkk 0000 0000 1001 01xx kkkk kkkk 0000 0000 1000 TO PD 0000 0110 0011 , C,DC,Z 110x kkkk kkkk Z 1010 kkkk kkkk 1998 Microchip Technology Inc. ...
Page 75
... Some of the features include a RS-232 inter- face, push-button switches, a potentiometer for simu- lated analog input, a Serial EEPROM to demonstrate 2 usage of the I C bus and separate headers for connec- tion to an LCD module and a keypad. 1998 Microchip Technology Inc. PIC16C72 Series Preliminary DS39016A-page 75 ...
Page 76
... PIC16C72 Series NOTES: DS39016A-page 76 Preliminary 1998 Microchip Technology Inc. ...
Page 77
... Exposure to maximum rating conditions for extended periods may affect device reliability. 1998 Microchip Technology Inc. PIC16C72 Series PIC16C72 -55 to +125˚ ...
Page 78
... Freq: 200 kHz max. The shaded sections indicate oscillator selections which are tested for functionality, but not for MIN/MAX specifications recommended that the user select the device type that ensures the specifications required. DS39016A-page 78 PIC16C72-20 PIC16LC72- 4. 2.5V to 6.0V ...
Page 79
... This is not tested. Note 6: The current is the additional current consumed when this peripheral is enabled. This current should be added to the base measurement 1998 Microchip Technology Inc. PIC16C72 Series -40˚C T +125˚C for extended, A -40˚C T +85˚C for industrial and A 0˚ ...
Page 80
... PIC16C72 Series 13.2 DC Characteristics: PIC16LC72/LCR72-04 (Commercial, Industrial) Standard Operating Conditions (unless otherwise stated) DC CHARACTERISTICS Operating temperature Param Characteristic Sym No. D001 Supply Voltage V DD D002* RAM Data Retention V DR Voltage (Note 1) D003 V start voltage POR ensure internal Power- on Reset signal D004* V rise rate to ensure ...
Page 81
... DC Characteristics: PIC16C72/CR72-04 (Commercial, Industrial, Extended) PIC16C72/CR72-10 (Commercial, Industrial, Extended) PIC16C72/CR72-20 (Commercial, Industrial, Extended) PIC16LC72/LCR72-04 (Commercial, Industrial) DC CHARACTERISTICS Param Characteristic No. Input Low Voltage I/O ports D030 with TTL buffer D030A D031 with Schmitt Trigger buffer D032 MCLR, OSC1 (in RC mode) D033 ...
Page 82
... Units Conditions -3.0 mA 4. -2.5 mA 4.5V - +125 -1.3 mA 4. -1.0 mA 4.5V - +125 C V RA4 pin, PIC16C72/LC72 V RA4 pin, PIC16CR72/LCR72 pF In XT, HS and LP modes when external clock is used to drive OSC1 1998 Microchip Technology Inc. ...
Page 83
... Low only AA output access BUF Bus free specifications only Hold ST DAT DATA input hold STA START condition FIGURE 13-1: LOAD CONDITIONS Load condition 1 V Pin R = 464 1998 Microchip Technology Inc. PIC16C72 Series osc High Low SU STO Load condition Pin V SS ...
Page 84
... HS osc mode (-04 osc mode (-10 osc mode (-20 osc mode ns RC osc mode ns XT osc mode ns HS osc mode (-04 osc mode (-10 osc mode (-20 osc mode 4/F CY OSC ns XT oscillator s LP oscillator ns HS oscillator ns XT oscillator ns LP oscillator ns HS oscillator 1998 Microchip Technology Inc. ...
Page 85
... Min — — — — — 200 OSC 0 — PIC16C72/CR72 100 PIC16LC72/LCR72 200 0 PIC16C72/CR72 — PIC16LC72/LCR72 — PIC16C72/CR72 — PIC16LC72/LCR72 — OSC Preliminary new value Typ† Max Units Conditions 75 200 ns Note 1 75 200 ns Note 1 35 100 ns Note 1 35 100 ...
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... Typ† Max Units 2 — — — 1024T — — OSC 28 72 132 ms — — 2.1 s 100 — — s Preliminary 1998 Microchip Technology Inc. 34 Conditions V = 5V, -40˚C to +125˚ 5V, -40˚C to +125˚ OSC1 period OSC V = 5V, -40˚C to +125˚ (D005) DD VDD ...
Page 87
... TCKEZtmr1 Delay from external clock edge to timer increment * These parameters are characterized but not tested. † Data in "Typ" column is at 5V, 25˚C unless otherwise stated. These parameters are for design guidance only and are not tested. 1998 Microchip Technology Inc. PIC16C72 Series ...
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... Data in "Typ" column is at 5V, 25˚C unless otherwise stated. These parameters are for design guidance only and are not tested. DS39016A-page Min 0. PIC16LC72/LCR72 20 0. PIC16LC72/LCR72 PIC16C72/CR72 — PIC16LC72/LCR72 — PIC16C72/CR72 — PIC16LC72/LCR72 — Preliminary Typ† Max Units Conditions — — ns — — ns — — ns — — ns — — ns — — ns — — prescale value (1 ...
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... Refer to Figure 13-1 for load conditions. FIGURE 13-9: SPI MASTER OPERATION TIMING (CKE = SCK (CKP = SCK (CKP = 1) MSB SDO SDI MSB IN 74 Refer to Figure 13-1 for load conditions. 1998 Microchip Technology Inc. PIC16C72 Series BIT6 - - - - - -1 MSB 75, 76 BIT6 - - - - BIT6 - - - - - -1 LSB 75, 76 BIT6 - - - -1 ...
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... FIGURE 13-11: SPI SLAVE MODE TIMING (CKE = SCK (CKP = 0) 71 SCK (CKP = 1) MSB SDO SDI SDI MSB IN 74 Refer to Figure 13-1 for load conditions. DS39016A-page MSB BIT6 - - - - - -1 75, 76 BIT6 - - - - BIT6 - - - - - -1 LSB 75, 76 BIT6 - - - -1 LSB IN Preliminary LSB 77 LSB 1998 Microchip Technology Inc. ...
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... SCK edge TscL2ssH * These parameters are characterized but not tested. † Data in "Typ" column is at 5V, 25˚C unless otherwise stated. These parameters are for design guidance only and are not tested. 1998 Microchip Technology Inc. PIC16C72 Series Min Typ† T — CY ...
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... Preliminary 93 92 STOP Condition Conditions Only relevant for repeated START condition After this period the first clock pulse is generated 1998 Microchip Technology Inc. ...
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... SCL signal. If such a device does stretch the LOW period of the SCL signal, it must output the next data bit to the SDA line T max.+tsu;DAT = 1000 + 250 = 1250 ns (according to the standard-mode I R released. 1998 Microchip Technology Inc. PIC16C72 Series 100 101 106 107 ...
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... PIC16C72 Series TABLE 13-12 A/D CONVERTER CHARACTERISTICS: PIC16C72/CR72-04 (Commercial, Industrial, Extended) PIC16C72/CR72-10 (Commercial, Industrial, Extended) PIC16C72/CR72-20 (Commercial, Industrial, Extended) PIC16LC72/LCR72-04 (Commercial, Industrial) Param Sym Characteristic No. A01 N Resolution R A02 E Total Absolute error ABS A03 E Integral linearity error IL A04 E Differential linearity error DL A05 ...
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... SLEEP instruction to be executed. TABLE 13-13 A/D CONVERSION REQUIREMENTS Param Sym Characteristic No. T A/D clock period PIC16C72/LCR72 130 AD PIC16LC72/LCR72 PIC16C72/LCR72 PIC16LC72/LCR72 131 T Conversion time CNV (not including S/H time) (Note 1) 132 T Acquisition time ACQ 134 Tgo Q4 to A/D clock start 135 ...
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... PIC16C72 Series NOTES: DS39016A-page 96 Preliminary 1998 Microchip Technology Inc. ...
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... FIGURE 14-1: TYPICAL I vs 2.5 3.0 FIGURE 14-2: MAXIMUM I vs 10.000 1.000 0.100 0.010 0.001 2.5 3.0 1998 Microchip Technology Inc. PIC16C72 Series PIC16C72 is standard deviation. (WDT DISABLED, RC MODE) DD 3.5 4.0 4.5 5.0 V (Volts) DD (WDT DISABLED, RC MODE) DD 3.5 4.0 4.5 5.0 V (Volts) DD Preliminary DD 5 ...
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... Cext = 22 pF 10k R = 100k 3.5 4.0 4.5 5.0 5.5 6.0 V (Volts) DD FREQUENCY vs Cext = 100 pF 3. 10k R = 100k 3.5 4.0 4.5 5.0 5.5 6.0 V (Volts) DD FREQUENCY vs Cext = 300 pF 3. 10k R = 100k 3.5 4.0 4.5 5.0 5.5 6.0 V (Volts) DD 1998 Microchip Technology Inc. ...
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... Brown-out 400 Reset 200 4.3 0 2.5 3.0 3.5 4.0 4.5 5.0 V (Volts) DD The shaded region represents the built-in hysteresis of the brown-out reset circuitry. 1998 Microchip Technology Inc. PIC16C72 Series PIC16C72 BROWN- FIGURE 14-10: TYPICAL 5.5 6.0 0 2.5 3.0 DD FIGURE 14-11: MAXIMUM I ...
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... Frequency (MHz) Preliminary 6.0V 5.5V 5.0V 4.5V 4.0V 3.5V 3.0V 2.5V 3.5 4.0 4.5 Shaded area is beyond recommended range 6.0V 5.5V 5.0V 4.5V 4.0V 3.5V 3.0V 2.5V 3.5 4.0 4.5 Shaded area is beyond recommended range 1998 Microchip Technology Inc. ...
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... FREQUENCY (RC MODE @ 100 pF, - 1600 1400 1200 1000 800 600 400 200 0 0 200 400 Shaded area is beyond recommended range 1998 Microchip Technology Inc. PIC16C72 Series PIC16C72 600 800 1000 1200 Frequency (kHz) 600 800 1000 1200 Frequency (kHz) Preliminary 6.0V 5.5V 5 ...
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... DS39016A-page 102 PIC16C72 200 300 400 500 Frequency (kHz) 200 300 400 500 Frequency (kHz) Preliminary 6.0V 5.5V 5.0V 4.5V 4.0V 3.5V 3.0V 2.5V 600 700 6.0V 5.5V 5.0V 4.5V 4.0V 3.5V 3.0V 2.5V 600 700 1998 Microchip Technology Inc. ...
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... The percentage variation indicated here is part to part variation due to normal process distribution. The variation indicated is 3 standard deviation from average value for V = 5V. DD 1998 Microchip Technology Inc. PIC16C72 Series PIC16C72 FIGURE 14-19: TRANSCONDUCTANCE(gm) 4.0 3.5 5.0V 3.0 4.0V 2 ...
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... MHz MHz MHz MHz 15-33 pF 15- MHz 15-33 pF 15-33 pF Epson C-001R32.768K-A 20 PPM STD XTL 200.000KHz 20 PPM ECS ECS-10-13-1 50 PPM ECS ECS-40-20-1 50 PPM EPSON CA-301 8.000M-C 30 PPM EPSON CA-301 20.000M-C 30 PPM 1998 Microchip Technology Inc. ...
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... Frequency (kHz) 1998 Microchip Technology Inc. PIC16C72 Series PIC16C72 FIGURE 14-27: TYPICAL I 1800 1600 1400 1200 1000 800 600 400 150 200 200 0 0.0 0.4 0.8 FIGURE 14-28: MAXIMUM I 1800 ...
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... DS39016A-page 106 PIC16C72 FIGURE 14-30: MAXIMUM I FREQUENCY (HS MODE, - 7.0 6.0 5.0 4.0 3.0 6.0V 2.0 5.5V 5.0V 1.0 4. Intensity ( W/ Distance from UV lamp cm2) (inches) 12,000 1 12,000 1 12,000 1 12,000 1 Preliminary vs Frequency (MHz) (1) Typical Time (minutes 1998 Microchip Technology Inc. ...
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... DC AND AC CHARACTERISTICS GRAPHS AND TABLES - PIC16CR72 NO GRAPHS OR TABLES AVAILABLE AT THIS TIME 1998 Microchip Technology Inc. PIC16C72 Series PIC16CR72 Preliminary DS39016A-page 107 ...
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... PIC16C72 Series NOTES: DS39016A-page 108 PIC16CR72 Preliminary 1998 Microchip Technology Inc. ...
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... For OTP marking beyond this, certain price adders apply. Please check with your Microchip Sales Office. For QTP devices, any special marking adders are included in QTP price. 1998 Microchip Technology Inc. PIC16C72 Series Example ...
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... Microchip Technology Inc. ...
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... Dimensions “D” and “E” do not include mold flash or protrusions. Mold flash or protrusions shall not exceed 0.010” (0.254 mm) per side or 0.020” (0.508 mm) more than dimensions “D” or “E.” 1998 Microchip Technology Inc. PIC16C72 Series A B1 ...
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... Microchip Technology Inc. ...
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... Dimensions “D” and “E” do not include mold flash or protrusions. Mold flash or protrusions shall not exceed 0.010” (0.254 mm) per side or 0.020” (0.508 mm) more than dimensions “D” or “E.” 1998 Microchip Technology Inc. PIC16C72 Series D 2 ...
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... PIC16C72 Series NOTES: DS39016A-page 114 Preliminary 1998 Microchip Technology Inc. ...
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... PIC16C72 device was previously found in the PIC16C7X Data Sheet, DS30390. Information on the PIC16CR72 device is new. APPENDIX B: WHAT’S CHANGED IN THIS DATA SHEET New data sheet. 1998 Microchip Technology Inc. PIC16C72 Series APPENDIX C: DEVICE DIFFERENCES A table of the differences between the devices described in this document is found below. Difference ...
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... PIC16C72 Series NOTES: DS39016A-page 116 Preliminary 1998 Microchip Technology Inc. ...
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... BOR bit ........................................................................ 14, 64 Buffer Full Status bit, BF .............................................. 40 bit ...................................................................................... 9 Capture/Compare/PWM Capture Block Diagram ................................................... 34 CCP1CON Register ........................................... 33 CCP1IF .............................................................. 34 CCPR1 ............................................................... 34 CCPR1H:CCPR1L ............................................. 34 1998 Microchip Technology Inc. PIC16C72 Series Mode ................................................................. 34 Prescaler ........................................................... 34 CCP Timer Resources ............................................... 33 Compare Block Diagram ................................................... 35 Mode ................................................................. 35 Software Interrupt Mode .................................... 35 Special Event Trigger ........................................ 35 Special Trigger Output of CCP1 ........................ 35 Special Trigger Output of CCP2 ...
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... Power Control Register (PCON) ................................ 64 Power-on Reset (POR) ........................................ 59, 65 Power-up Timer (PWRT) ........................................... 59 Power-Up-Timer (PWRT) .......................................... 63 Time-out Sequence ................................................... 64 TO .............................................................................. 61 POR bit ........................................................................ 14, 64 Port RB Interrupt ................................................................ 68 PORTA .............................................................................. 65 PORTA Register ............................................................ 7, 19 PORTB .............................................................................. 65 PORTB Register ............................................................ 7, 21 PORTC .............................................................................. 65 PORTC Register ............................................................ 7, 23 Power-down Mode (SLEEP) .............................................. 71 Preliminary 1998 Microchip Technology Inc. ...
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... Mode .......................................................................... 42 Serial Clock ................................................................ 45 Serial Data In ............................................................. 45 Serial Data Out .......................................................... 45 Slave Select ............................................................... 45 SPI Mode ................................................................... 45 SSPCON .................................................................... 44 SSPSTAT ................................................................... 43 1998 Microchip Technology Inc. PIC16C72 Series SPI Clock Edge Select bit, CKE ........................................ 43 SPI Data Input Sample Phase Select bit, SMP ................. 43 SPI Mode ........................................................................... 42 SS ...................................................................................... 42 SSP Module Overview ....................................................... 39 Section ...
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... TOUTPS3 bit ...................................................................... 32 TRISA Register .............................................................. 8, 19 TRISB Register .............................................................. 8, 21 TRISC Register .............................................................. ................................................................................ 40, 43 Update Address bit, UA ................................................ 40 Wake-up from SLEEP ........................................................ 71 Watchdog Timer (WDT) ................................... 59, 61, 64, 70 WCOL .......................................................................... 41, 44 WDT ................................................................................... 64 Block Diagram ............................................................ 70 Timeout ...................................................................... 65 Write Collision Detect bit, WCOL ................................. 41 bit ...................................................................................... 9 DS39016A-page 120 Preliminary 1998 Microchip Technology Inc. ...
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... Trademarks: The Microchip name, logo, PIC, PICSTART, PICMASTER and PRO MATE are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. PICmicro, Flex ROM, MPLAB and fuzzy- LAB are trademarks and SQTP is a service mark of Micro- chip in the U ...
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... Is there any incorrect or misleading information (what and where)? 7. How would you improve this document? 8. How would you improve our software, systems, and silicon products? DS39016A-page 122 Total Pages Sent FAX: (______) _________ - _________ N Literature Number: DS39016A 1998 Microchip Technology Inc. ...
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... PIC16C72 Series /XX XXX Examples: Package Pattern f) PIC16C72 -04/P 301 = Commercial temp., PDIP package, 4 MHz, normal V pattern #301. g) PIC16LC72 - 04I/SO = Industrial temp., SOIC package, 200 kHz, Extended V (2) h) PIC16CR72 - 10I/P = ROM program memory, (2) Industrial temp., PDIP package, 10MHz, nor- (2) mal V (2) Note 1: ...
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... Serialized Quick Turn Programming (SQTP service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. © 2002, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved. Printed on recycled paper. Microchip received QS-9000 quality system ...
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... Korea Microchip Technology Korea 168-1, Youngbo Bldg. 3 Floor Samsung-Dong, Kangnam-Ku Seoul, Korea 135-882 Tel: 82-2-554-7200 Fax: 82-2-558-5934 Singapore Microchip Technology Singapore Pte Ltd. 200 Middle Road #07-02 Prime Centre Singapore, 188980 Tel: 65-334-8870 Fax: 65-334-8850 Taiwan Microchip Technology Taiwan 11F-3, No. 207 ...