PIC17C42A-33I/PQ Microchip Technology, PIC17C42A-33I/PQ Datasheet - Page 126
![IC MCU OTP 2KX16 PWM 44-MQFP](/photos/6/59/65984/150-44-pqfp_sml.jpg)
PIC17C42A-33I/PQ
Manufacturer Part Number
PIC17C42A-33I/PQ
Description
IC MCU OTP 2KX16 PWM 44-MQFP
Manufacturer
Microchip Technology
Series
PIC® 17Cr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC17C42A-16P.pdf
(241 pages)
3.PIC17C42A-16P.pdf
(4 pages)
Specifications of PIC17C42A-33I/PQ
Core Processor
PIC
Core Size
8-Bit
Speed
33MHz
Connectivity
UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
33
Program Memory Size
4KB (2K x 16)
Program Memory Type
OTP
Ram Size
232 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 6 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
44-MQFP, 44-PQFP
Processor Series
PIC17C
Core
PIC
Data Bus Width
8 bit
Data Ram Size
232 B
Interface Type
SCI, USART
Maximum Clock Frequency
33 MHz
Number Of Programmable I/os
33
Number Of Timers
8
Operating Supply Voltage
2.5 V to 6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
ICE2000
Minimum Operating Temperature
- 40 C
For Use With
AC164316 - MODULE SKT MPLAB PM3 44MQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC17C42A-33I/PQ
Manufacturer:
Microchip Technology
Quantity:
10 000
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PIC17C4X
MOVFP
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
Example:
DS30412C-page 126
Before Instruction
After Instruction
Decode
REG1
REG2
REG1
REG2
Q1
register 'f'
Move f to p
[ label ]
0
0
(f)
Move data from data memory location 'f'
to data memory location 'p'. Location 'f'
can be anywhere in the 256 word data
space (00h to FFh) while 'p' can be 00h
to 1Fh.
Either ’p' or 'f' can be WREG (a useful
special situation).
MOVFP is particularly useful for transfer-
ring a data memory location to a periph-
eral register (such as the transmit buffer
or an I/O port). Both 'f' and 'p' can be
indirectly addressed.
1
1
MOVFP
None
Read
011p
Q2
=
=
=
=
f
p
(p)
255
31
0x33,
0x11
0x33,
0x33
MOVFP f,p
REG1, REG2
pppp
Execute
Q3
ffff
register 'p'
Write
Q4
ffff
MOVLB
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
Example:
Note:
Before Instruction
After Instruction
Decode
BSR register
BSR register
Q1
For the PIC17C42, only the low four bits of
the BSR register are physically imple-
mented. The upper nibble is read as '0'.
literal 'u:k'
Move Literal to low nibble in BSR
[ label ]
0
k
None
The four bit literal 'k' is loaded in the
Bank Select Register (BSR). Only the
low 4-bits of the Bank Select Register
are affected. The upper half of the BSR
is unchanged. The assembler will
encode the “u” fields as '0'.
1
1
MOVLB
Read
1011
Q2
=
=
k
(BSR<3:0>)
1996 Microchip Technology Inc.
15
0x22
0x25
MOVLB k
0x5
1000
Execute
Q3
uuuu
Write literal
BSR<3:0>
'k' to
Q4
kkkk
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