PIC17LC43-08I/PT Microchip Technology, PIC17LC43-08I/PT Datasheet - Page 138
![IC MCU OTP 4KX16 PWM 44TQFP](/photos/6/82/68251/c04-076_pt_sml.jpg)
PIC17LC43-08I/PT
Manufacturer Part Number
PIC17LC43-08I/PT
Description
IC MCU OTP 4KX16 PWM 44TQFP
Manufacturer
Microchip Technology
Series
PIC® 17Cr
Specifications of PIC17LC43-08I/PT
Core Processor
PIC
Core Size
8-Bit
Speed
8MHz
Connectivity
UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
33
Program Memory Size
8KB (4K x 16)
Program Memory Type
OTP
Ram Size
454 x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 6 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
44-TQFP, 44-VQFP
Processor Series
PIC17LC
Core
PIC
Data Bus Width
8 bit
Data Ram Size
454 B
Interface Type
SCI, USART
Maximum Clock Frequency
33 MHz
Number Of Programmable I/os
33
Number Of Timers
8
Operating Supply Voltage
2 V to 6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Data Rom Size
454 B
Height
1 mm
Length
10 mm
Supply Voltage (max)
5.5 V
Supply Voltage (min)
4.5 V
Width
10 mm
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC17LC43-08I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
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PIC17C4X
TABLRD
Example1:
Example2:
DS30412C-page 138
Before Instruction
After Instruction (table write completion)
Before Instruction
After Instruction (table write completion)
REG
TBLATH
TBLATL
TBLPTR
MEMORY(TBLPTR)
REG
TBLATH
TBLATL
TBLPTR
MEMORY(TBLPTR)
REG
TBLATH
TBLATL
TBLPTR
MEMORY(TBLPTR)
REG
TBLATH
TBLATL
TBLPTR
MEMORY(TBLPTR)
Table Read
TABLRD
TABLRD
1, 1, REG ;
0, 0, REG ;
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
0x53
0xAA
0x55
0xA356
0x1234
0xAA
0x12
0x34
0xA357
0x5678
0x53
0xAA
0x55
0xA356
0x1234
0x55
0x12
0x34
0xA356
0x1234
TABLWT
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
Note:
Decode
Q1
The MCLR/V
voltage for successful programming of internal
memory.
If MCLR/V
the programming sequence of internal memory
will be executed, but will not be successful
(although the internal memory location may be
disturbed)
register 'f'
PP
Table Write
[ label ] TABLWT t,i,f
0
i
t
If t = 0,
If t = 1,
If i = 1,
None
1.
2.
3.
1
2 (many if write is to on-chip
EPROM program memory)
Read
1010
PP
= V
Q2
f
f
TBLAT
TBLPTR + 1
[0,1]
[0,1]
f
Load value in ’f’ into 16-bit table
latch (TBLAT)
If t = 0: load into low byte;
If t = 1: load into high byte
The contents of TBLAT is written
to the program memory location
pointed to by TBLPTR
If TBLPTR points to external
program memory location, then
the instruction takes two-cycle
If TBLPTR points to an internal
EPROM
instruction is terminated when
an interrupt is received.
The TBLPTR can be automati-
cally incremented
If i = 0; TBLPTR is not
If i = 1; TBLPTR is incremented
pin must be at the programming
DD
1996 Microchip Technology Inc.
255
TBLATL;
TBLATH;
11ti
incremented
Execute
Prog Mem (TBLPTR);
location,
Q3
TBLPTR
ffff
then
TBLATH or
TBLATL
register
Write
Q4
ffff
the
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