PIC18C658/CL Microchip Technology, PIC18C658/CL Datasheet - Page 2
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PIC18C658/CL
Manufacturer Part Number
PIC18C658/CL
Description
IC MCU OTP 16KX16 CAN 68-PLCC
Manufacturer
Microchip Technology
Series
PIC® 18Cr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16C770-ISO.pdf
(8 pages)
3.PIC18C658-IPT.pdf
(366 pages)
4.PIC18C658-IPT.pdf
(16 pages)
5.PIC18C658-IPT.pdf
(16 pages)
6.PIC18C658-IPT.pdf
(16 pages)
Specifications of PIC18C658/CL
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
CAN, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
52
Program Memory Size
32KB (16K x 16)
Program Memory Type
OTP
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
68-PLCC
For Use With
AC164308 - MODULE SKT FOR PM3 68PLCCDVA18PQ640 - DEVICE ADAPT PIC18C658 64-TQFP
Lead Free Status / RoHS Status
Request inventory verification / Request inventory verification
Eeprom Size
-
Other names
Q1068347
PIC18C658/858
4. Module: BOR
5. Module: Interrupts
TABLE 2:
REGISTER 17-12: RXB0CON - RECEIVE BUFFER 0 CONTROL REGISTER
DS80084M-page 2
Param No.
Note:
The minimum and maximum BOR Voltage levels
(parameter D005) have changed. The new values
are shown in Table 2 (below).
Work around
None.
Date Codes that pertain to this issue:
The devices may exhibit erratic execution if config-
ured with one or more external interrupts enabled.
This may occur, regardless of the number of inter-
rupts enabled, in any of the combinations of con-
figurations (i.e., Rising or Falling Edge mode), or
priorities.
Work around
1. Do not enable external interrupts.
2. Use the latest silicon revision when it becomes
D005
bit 6-5
available.
When the manufacture date of a newer
version of silicon is in production, the last
date where this issue may occur will be
specified.
ALL
Symbol
V
BOR MAXIMUM VOLTAGES
RXM1:RXM0: Receive Buffer Mode bits
11 = Receive all messages (including those with errors)
10 = Receive only valid messages with standard identifier
01 = Receive only valid messages with extended identifier
00 = Receive all valid messages
BOR
BOR Voltage
Characteristic
BORV<1:0> = 11
BORV<1:0> = 10
BORV<1:0> = 01
BORV<1:0> = 00
6. Module: Watchdog Timer
7. Module: CAN
After the WDT is allowed to time-out, all subsequent
WDT periods following the very first, may double in
duration. This can occur if the CLRWDT instruction is
not executed prior to the timer timing out.
Work around
Always execute the CLRWDT instruction prior to
entering a potential WDT time-out condition.
Two of the Receive Buffer modes defined by bits
RXM1 and RXM0 of the RXB0CON register
(RXB0CON<6:5>), are currently reversed from
their description in the original Device Data Sheet
(DS30475A). The actual values for these bits are
shown in the excerpt from Register 17-12 (below)
(changes from the original data sheet in bold).
This anomaly is particular to this silicon revision.
Future revisions will restore the operation of these
bits to their original description in the Device Data
Sheet (DS30475A).
Work around
1. Always configure the mode for Receive
2. Use the latest silicon revision when it becomes
Buffer 0 as ‘Receive All Valid Messages’ (bits
RXM1:RXM0 = 00). In addition, use the
EXIDEN bit of the RXF0SIDL register
(RXF0SIDL<3>) to set the filter for standard or
extended ID messages. Set EXIDEN (= 1) for
extended ID messages, and clear EXIDEN for
standard ID messages.
available.
Min.
2.35
2.55
3.95
4.23
2003 Microchip Technology Inc.
Max.
2.80
3.02
4.71
5.05
Units
V
V
V
V