AT89S8252-24AC Atmel, AT89S8252-24AC Datasheet - Page 4

MCU W/SPI 8KB FLSH 2K EEP 44TQFP

AT89S8252-24AC

Manufacturer Part Number
AT89S8252-24AC
Description
MCU W/SPI 8KB FLSH 2K EEP 44TQFP
Manufacturer
Atmel
Series
89Sr
Datasheet

Specifications of AT89S8252-24AC

Core Processor
8051
Core Size
8-Bit
Speed
24MHz
Connectivity
SPI, UART/USART
Peripherals
POR, WDT
Number Of I /o
32
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 6 V
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
44-TQFP, 44-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Data Converters
-
Other names
AT89S825224AC

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Port 2
Port 3
4
AT89S8252
Some Port 1 pins provide additional functions. P1.0 and P1.1 can be configured to be
the timer/counter 2 external count input (P1.0/T2) and the timer/counter 2 trigger input
(P1.1/T2EX), respectively.
Furthermore, P1.4, P1.5, P1.6, and P1.7 can be configured as the SPI slave port select,
data input/output and shift clock input/output pins as shown in the following table.
Port 1 also receives the low-order address bytes during Flash programming and
verification.
Port 2 is an 8-bit bi-directional I/O port with internal pull-ups. The Port 2 output buffers
can sink/source four TTL inputs. When 1s are written to Port 2 pins, they are pulled high
by the internal pull-ups and can be used as inputs. As inputs, Port 2 pins that are exter-
nally being pulled low will source current (I
Port 2 emits the high-order address byte during fetches from external program memory
and during accesses to external data memory that use 16-bit addresses (MOVX @
DPTR). In this application, Port 2 uses strong internal pull-ups when emitting 1s. During
accesses to external data memory that use 8-bit addresses (MOVX @ RI), Port 2 emits
the contents of the P2 Special Function Register.
Port 2 also receives the high-order address bits and some control signals during Flash
programming and verification.
Port 3 is an 8-bit bi-directional I/O port with internal pull-ups. The Port 3 output buffers
can sink/source four TTL inputs. When 1s are written to Port 3 pins, they are pulled high
by the internal pull-ups and can be used as inputs. As inputs, Port 3 pins that are exter-
nally being pulled low will source current (I
Port 3 receives some control signals for Flash programming and verification.
Port 3 also serves the functions of various special features of the AT89S8252, as shown
in the following table.
Port Pin
P1.0
P1.1
P1.4
P1.5
P1.6
P1.7
Alternate Functions
T2 (external count input to Timer/Counter 2), clock-out
T2EX (Timer/Counter 2 capture/reload trigger and direction control)
SS (Slave port select input)
MOSI (Master data output, slave data input pin for SPI channel)
MISO (Master data input, slave data output pin for SPI channel)
SCK (Master clock output, slave clock input pin for SPI channel)
IL
IL
) because of the internal pull-ups.
) because of the pull-ups.
0401G–MICRO–3/06

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