AT89LV52-12JI Atmel, AT89LV52-12JI Datasheet - Page 6

IC MICRO CTRL 12MHZ 44PLCC

AT89LV52-12JI

Manufacturer Part Number
AT89LV52-12JI
Description
IC MICRO CTRL 12MHZ 44PLCC
Manufacturer
Atmel
Series
89LVr
Datasheet

Specifications of AT89LV52-12JI

Core Processor
8051
Core Size
8-Bit
Speed
12MHz
Connectivity
UART/USART
Number Of I /o
32
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 6 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-PLCC
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Data Converters
-
Peripherals
-
Other names
AT89LV5212JI

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ATMEL
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Timer 0 and 1
Timer 0 and Timer 1 in the AT89LV52 operate the same
way as Timer 0 and Timer 1 in the AT89LV51.
Timer 2
Timer 2 is a 16-bit Timer/Counter that can operate as either
a timer or an event counter. The type of operation is
selected by bit C/T2 in the SFR T2CON (shown in Table 2).
Timer 2 has three operating modes: capture, auto-reload
(up or down counting), and baud rate generator. The
modes are selected by bits in T2CON, as shown in Table 3.
Timer 2 consists of two 8-bit registers, TH2 and TL2. In the
Timer function, the TL2 register is incremented every
machine cycle. Since a machine cycle consists of 12 oscil-
lator periods, the count rate is 1/12 of the oscillator fre-
quency.
In the Counter function, the register is incremented in
response to a 1-to-0 transition at its corresponding external
input pin, T2. In this function, the external input is sampled
Figure 1. Timer 2 in Capture Mode
Capture Mode
In the capture mode, two options are selected by bit
EXEN2 in T2CON. If EXEN2 = 0, Timer 2 is a 16-bit timer
or counter which upon overflow sets bit TF2 in T2CON.
This bit can then be used to generate an interrupt. If
EXEN2 = 1, Timer 2 performs the same operation, but a 1-
to-0 transition at external input T2EX also causes the cur-
rent value in TH2 and TL2 to be captured into RCAP2H and
RCAP2L, respectively. In addition, the transition at T2EX
causes bit EXF2 in T2CON to be set. The EXF2 bit, like
TF2, can generate an interrupt. The capture mode is illus-
trated in Figure 1.
4-88
Not
during S5P2 of every machine cycle. When the samples
show a high in one cycle and a low in the next cycle, the
count is incremented. The new count value appears in the
register during S3P1 of the cycle following the one in which
the transition was detected. Since two machine cycles (24
oscillator periods) are required to recognize a 1-to-0 transi-
tion, the maximum count rate is 1/24 of the oscillator fre-
quency. To ensure that a given level is sampled at least
once before it changes, the level should be held for at least
one full machine cycle.
Table 3. Timer 2 Operating Modes
Auto-Reload (Up or Down Counter)
Timer 2 can be programmed to count up or down when
configured in its 16-bit auto-reload mode. This feature is
invoked by the DCEN (Down Counter Enable) bit located in
the SFR T2MOD (see Table 4). Upon reset, the DCEN bit
is set to 0 so that timer 2 will default to count up. When
DCEN is set, Timer 2 can count up or down, depending on
the value of the T2EX pin.
Figure 2 shows Timer 2 automatically counting up when
DCEN = 0. In this mode, two options are selected by bit
EXEN2 in T2CON. If EXEN2 = 0, Timer 2 counts up to
0FFFFH and then sets the TF2 bit upon overflow. The over-
flow also causes the timer registers to be reloaded with the
RCLK + TCLK
X
0
0
1
CP/RL2
0
1
X
X
TR2
1
1
1
0
MODE
16-Bit Auto-Reload
16-Bit Capture
Baud Rate Generator
(Off)

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