PIC16F84A-04E/SO Microchip Technology, PIC16F84A-04E/SO Datasheet - Page 599
![IC MCU CMOS 4MHZ 1K FLASH 18SOIC](/photos/6/76/67656/150-18-soic_sml.jpg)
PIC16F84A-04E/SO
Manufacturer Part Number
PIC16F84A-04E/SO
Description
IC MCU CMOS 4MHZ 1K FLASH 18SOIC
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16F688T-ISL.pdf
(688 pages)
2.PIC16F84A-04P.pdf
(88 pages)
3.PIC16F84A-04P.pdf
(6 pages)
Specifications of PIC16F84A-04E/SO
Core Processor
PIC
Core Size
8-Bit
Speed
4MHz
Peripherals
POR, WDT
Number Of I /o
13
Program Memory Size
1.75KB (1K x 14)
Program Memory Type
FLASH
Eeprom Size
64 x 8
Ram Size
68 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
18-SOIC (7.5mm Width)
For Use With
I3-DB16F84A - BOARD DAUGHTER ICEPIC3
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Data Converters
-
Connectivity
-
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Table 30-26:
Param.
D102
Note 1: As a transmitter, the device must provide this internal minimum delay time to bridge the undefined region
No.
1997 Microchip Technology Inc.
100
101
102
103
106
107
109
110
90
91
92
2: A fast-mode I
T
T
T
T
T
T
T
T
T
T
T
Cb
(min. 300 ns) of the falling edge of SCL to avoid unintended generation of START or STOP conditions.
tsu;DAT
LOW period of the SCL signal. If such a device does stretch the LOW period of the SCL signal, it must output
the next data bit to the SDA line.
T
the SCL line is released.
Symbol
HIGH
LOW
R
F
SU
HD
HD
SU
SU
AA
BUF
R
max. + tsu;DAT = 1000 + 250 = 1250 ns (according to the standard-mode I
:
:
:
:
:
STA
DAT
STO
STA
DAT
Example SSP I
250 ns must then be met. This will automatically be the case if the device does not stretch the
Clock high time
Clock low time
SDA and SCL rise
time
SDA and SCL fall
time
START condition
setup time
START condition
hold time
Data input hold
time
Data input setup
time
STOP condition
setup time
Output valid from
clock
Bus free time
Bus capacitive loading
2
Section 30. Electrical Specifications
C-bus device can be used in a standard-mode I
2
Characteristic
C Bus Data Requirements
100 kHz mode
400 kHz mode
SSP Module
100 kHz mode
400 kHz mode
SSP Module
100 kHz mode
400 kHz mode
100 kHz mode
400 kHz mode
100 kHz mode
400 kHz mode
100 kHz mode
400 kHz mode
100 kHz mode
400 kHz mode
100 kHz mode
400 kHz mode
100 kHz mode
400 kHz mode
100 kHz mode
400 kHz mode
100 kHz mode
400 kHz mode
20 + 0.1Cb
20 + 0.1Cb
1.5T
1.5T
Min
250
100
4.0
0.6
4.7
1.3
4.7
0.6
4.0
0.6
4.7
0.6
4.7
1.3
—
—
—
—
—
0
0
CY
CY
2
C-bus system, but the requirement
1000
3500
Max
300
300
300
0.9
400
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
Units
pF
ns
ns
ns
ns
ns
ns
ns
ns
ns
s
s
s
s
s
s
s
s
s
s
s
s
s
2
C bus specification) before
PIC16CXXX must operate
at a minimum of 1.5 MHz
PIC16CXXX must operate
at a minimum of 10 MHz
PIC16CXXX must operate
at a minimum of 1.5 MHz
PIC16CXXX must operate
at a minimum of 10 MHz
Cb is specified to be from
10 to 400 pF
Cb is specified to be from
10 to 400 pF
Only relevant for repeated
START condition
After this period the first
clock pulse is generated
Note 2
Note 1
Time the bus must be free
before a new transmission
can start
DS31030A-page 30-29
Conditions
30
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