PIC16F84AT-04E/SS Microchip Technology, PIC16F84AT-04E/SS Datasheet - Page 352
![IC MCU CMOS 4MHZ 1K FLASH 20SSOP](/photos/6/58/65895/150-20-ssop_sml.jpg)
PIC16F84AT-04E/SS
Manufacturer Part Number
PIC16F84AT-04E/SS
Description
IC MCU CMOS 4MHZ 1K FLASH 20SSOP
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16F688T-ISL.pdf
(688 pages)
2.PIC16F84A-04P.pdf
(88 pages)
3.PIC16F84A-04P.pdf
(6 pages)
Specifications of PIC16F84AT-04E/SS
Core Processor
PIC
Core Size
8-Bit
Speed
4MHz
Peripherals
POR, WDT
Number Of I /o
13
Program Memory Size
1.75KB (1K x 14)
Program Memory Type
FLASH
Eeprom Size
64 x 8
Ram Size
68 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
20-SSOP
For Use With
XLT20SS1-1 - SOCKET TRANSITION 20DIP 20SSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Data Converters
-
Connectivity
-
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PICmicro MID-RANGE MCU FAMILY
DS31018A-page 18-16
PIR
RCSTA
TXREG
PIE
TXSTA
SPBRG Baud Rate Generator Register
Legend: x = unknown, - = unimplemented, read as '0'.
Note 1: The position of this bit is device dependent.
RX/DT pin
TX/CK pin
TXREG reg
Write to
Name
(Interrupt flag)
TXEN bit
TRMT bit
TXIF bit
TRMT
TXREG reg
Shaded cells are not used for Synchronous Master Transmission.
RX/DT pin
TX/CK pin
TRMT bit
Q1Q2 Q3Q4 Q1 Q2Q3 Q4Q1 Q2Q3 Q4Q1 Q2Q3 Q4Q1 Q2 Q3Q4
CSRC
SPEN
'1'
TXIF bit
Bit 7
Write to
TX7
Note: Sync master mode; SPBRG = '0'. Continuous transmission of two 8-bit words.
Write word1
Steps to follow when setting up a Synchronous Master Transmission:
1.
2.
3.
4.
5.
6.
7.
Table 18-8: Registers Associated with Synchronous Master Transmission
Figure 18-10:
Figure 18-11:
Bit 6
RX9
TX6
TX9
Initialize the SPBRG register for the appropriate baud rate (Subsection
Baud Rate Generator (BRG)”
Enable the synchronous master serial port by setting the SYNC, SPEN, and CSRC bits.
If interrupts are desired, then set the TXIE bit.
If 9-bit transmission is desired, then set the TX9 bit.
Enable the transmission by setting the TXEN bit.
If 9-bit transmission is selected, the ninth bit should be loaded in the TX9D bit.
Start transmission by loading data to the TXREG register.
SREN CREN
TXEN SYNC
Bit 0
Bit 5
TX5
Write word2
WORD 1
Bit 1
Bit 4
TX4
bit0
Synchronous Transmission
Synchronous Transmission (Through TXEN)
TXIF
TXIE
Bit 2
Bit 3
TX3
—
—
(1)
(1)
bit1
BRGH
FERR
Bit 2
).
TX2
Q3Q4 Q1Q2 Q3Q4 Q1Q2 Q3Q4 Q1Q2 Q3 Q4Q1 Q2Q3 Q4Q1 Q2Q3 Q4Q1 Q2Q3 Q4
bit2
Bit 7
OERR
TRMT
Bit 1
TX1
Bit 0
RX9D
WORD 2
TX9D
Bit 0
TX0
bit6
Bit 1
0000 -00x
0000 0000
0000 -010
0000 0000
Value on:
1997 Microchip Technology Inc.
POR,
BOR
0
0
bit7
18.3 “USART
other Resets
Value on all
0000 -00x
0000 0000
0000 -010
0000 0000
Bit 7
0
0
'1'
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