PIC16LCE625-04E/SO Microchip Technology, PIC16LCE625-04E/SO Datasheet - Page 61

• Manufacturer Part Number: PIC16LCE625-04E/SO
• Description: IC MCU CMOS 2K OTP W/EEPRM18SOIC
• Manufacturer: Microchip Technology
• Series: PIC® 16Cr

Specifications of PIC16LCE625-04E/SO

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 4MHz
• Peripherals: Brown-out Detect/Reset, POR, WDT
• Number Of I /o: 13
• Program Memory Size: 3.5KB (2K x 14)
• Program Memory Type: OTP
• Eeprom Size: 128 x 8
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 18-SOIC (7.5mm Width)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Data Converters: -
• Connectivity: -
• Other names: PIC16LCE62504E/SO

10.6
During an interrupt, only the return PC value is saved
on the stack. Typically, users may wish to save key reg-
isters during an interrupt (i.e. W register and STATUS
register). This will have to be implemented in software.
Example 10-1 stores and restores the STATUS and W
registers. The user register, W_TEMP, must be defined
in both banks and must be defined at the same offset
from the bank base address (i.e., W_TEMP is defined
at 0x70 in Bank 0 and it must also be defined at 0xF0
in Bank 1). The user register, STATUS_TEMP, must be
defined in Bank 0. The Example 10-1:
• Stores the W register
• Stores the STATUS register in Bank 0
• Executes the ISR code
• Restores the STATUS (and bank select bit
• Restores the W register
EXAMPLE 10-1: SAVING THE STATUS AND
MOVWF
SWAPF
BCF
MOVWF
SWAPF
MOVWF
SWAPF
SWAPF
1999 Microchip Technology Inc.
register)
:
:
:
Context Saving During Interrupts
W_TEMP
STATUS,W
STATUS,RP0
STATUS_TEMP
(ISR)
STATUS_TEMP,W
STATUS
W_TEMP,F
W_TEMP,W
W REGISTERS IN RAM
;copy W to temp register,
;could be in either bank
;swap status to be saved into W
;change to bank 0 regardless
;of current bank
;save status to bank 0
;register
;swap STATUS_TEMP register
;into W, sets bank to original
;state
;move W into STATUS register
;swap W_TEMP
;swap W_TEMP into W
10.7
The Watchdog Timer is a free running on-chip RC oscil-
lator which does not require any external components.
This RC oscillator is separate from the RC oscillator of
the CLKIN pin. That means that the WDT will run, even
if the clock on the OSC1 and OSC2 pins of the device
have been stopped, for example, by execution of a
SLEEP
time-out generates a device RESET. If the device is in
SLEEP mode, a WDT time-out causes the device to
wake-up and continue with normal operation. The WDT
can be permanently disabled by programming the con-
figuration bit WDTE as clear (Section 10.1).
10.7.1
The WDT has a nominal time-out period of 18 ms, (with
no prescaler). The time-out periods vary with tempera-
ture, V
DC specs). If longer time-out periods are desired, a
prescaler with a division ratio of up to 1:128 can be
assigned to the WDT under software control by writing
to the OPTION register. Thus, time-out periods up to
2.3 seconds can be realized.
The
and the postscaler, if assigned to the WDT, and prevent
it from timing out and generating a device RESET.
The TO bit in the STATUS register will be cleared upon
a Watchdog Timer time-out.
10.7.2
It should also be taken in account that under worst case
conditions (V
WDT prescaler), it may take several seconds before a
WDT time-out occurs.
CLRWDT
DD
instruction. During normal operation, a WDT
Watchdog Timer (WDT)
WDT PERIOD
WDT PROGRAMMING CONSIDERATIONS
and process variations from part to part (see
DD
and
= Min., Temperature = Max., max.
SLEEP
PIC16CE62X
instructions clear the WDT
DS40182C-page 61